Inventor
MORRISON MICHAEL JAMES
US3 patents
⚠️ This page may combine multiple inventors who share the name “MORRISON MICHAEL JAMES”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
2 patentsUS5880985AMar 9, 1999
Efficient combined array for 2n bit n bit multiplications
INTEL CORP65 citations94
US6021486AFeb 1, 2000
Continued processing of out-of-order non-architectual operations upon exceptions until flushing by architectual operations exceptions to avoid resume deadlock
INTEL CORP1 citations47