Inventor
SRIVASTAVA ANADI
US3 patents
Patents
3 patentsUS7820539B2Oct 26, 2010
Method for separately optimizing spacer width for two transistor groups using a recess spacer etch (RSE) integration
FREESCALE SEMICONDUCTOR INC2 citations54
US7563700B2Jul 21, 2009
Method for improving self-aligned silicide extendibility with spacer recess using an aggregated spacer recess etch (ASRE) integration
FREESCALE SEMICONDUCTOR INC6 citations54
US7902021B2Mar 8, 2011
Method for separately optimizing spacer width for two or more transistor classes using a recess spacer integration
FREESCALE SEMICONDUCTOR INC0 citations33