Inventor
WADHWA JATINDER K
US6 patents
Patents
6 patentsUS6788112B1Sep 7, 2004
High performance dual-stage sense amplifier circuit
IBM30 citations91
US6850460B1Feb 1, 2005
High performance programmable array local clock generator
IBM17 citations82
US7272030B2Sep 18, 2007
Global bit line restore timing scheme and circuit
IBM8 citations72
US7170774B2Jan 30, 2007
Global bit line restore timing scheme and circuit
IBM9 citations72
US6958943B1Oct 25, 2005
Programmable sense amplifier timing generator
IBM5 citations60
US7084673B2Aug 1, 2006
Output driver with pulse to static converter
IBM0 citations40