Inventor
CHIOU YA-LAN
TW5 patents
Patents
5 patentsUS12349369B2Jul 1, 2025
Layout pattern of magnetoresistive random access memory
UNITED MICROELECTRONICS CORP0 citations61
US12063791B2Aug 13, 2024
Layout pattern of magnetoresistive random access memory
UNITED MICROELECTRONICS CORP0 citations61
US11943935B2Mar 26, 2024
Layout pattern of magnetoresistive random access memory
UNITED MICROELECTRONICS CORP0 citations61
US11489010B2Nov 1, 2022
Layout pattern of magnetoresistive random access memory
UNITED MICROELECTRONICS CORP0 citations61
US10978122B1Apr 13, 2021
Memory including non-volatile cells and current driving circuit
UNITED MICROELECTRONICS CORP0 citations60