Inventor
PULLELA SATYAMURTHY
US7 patents
⚠️ This page may combine multiple inventors who share the name “PULLELA SATYAMURTHY”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
MOTOROLA INC
4 patentsUS5751593AMay 12, 1998
Accurate delay prediction based on multi-model analysis
MOTOROLA INC48 citations91
US5787008AJul 28, 1998
Simulation corrected sensitivity
MOTOROLA INC39 citations90
US5903471AMay 11, 1999
Method for optimizing element sizes in a semiconductor device
MOTOROLA INC20 citations88
US6074429AJun 13, 2000
Optimizing combinational circuit layout through iterative restructuring
MOTOROLA INC14 citations68
MONTEREY DESIGN SYSTEMS INC
2 patentsUS6651232B1Nov 18, 2003
Method and system for progressive clock tree or mesh construction concurrently with physical design
MONTEREY DESIGN SYSTEMS INC35 citations91
US6367051B1Apr 2, 2002
System and method for concurrent buffer insertion and placement of logic gates
MONTEREY DESIGN SYSTEMS INC31 citations90