Inventor

HAYWOOD CHRISTOPHER

US65 patents

⚠️ This page may combine multiple inventors who share the name “HAYWOOD CHRISTOPHER”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HAYWOOD CHRISTOPHER

RAMBUS INC

System and method for memory access in server communications

Memory controller systems with nonvolatile memory for storing operating parameters

Memory controller system with non-volatile backup storage

Heterogenous-latency memory optimization

Cascaded memory system

Inter-server memory pooling

Cascaded memory system

Memory buffer with data scrambling and error correction

Off-module data buffer

Nonvolatile physical memory with DRAM cache

Data buffer for memory devices with memory address remapping

Memory buffer with data scrambling and error correction

Nonvolatile physical memory with DRAM cache

Off-module data buffer

Nonvolatile physical memory with DRAM cache and mapping thereof

Memory buffer with data scrambling and error correction

Memory buffer with data scrambling and error correction

Low latency dynamic random access memory (DRAM) architecture with dedicated read-write data paths

Integrated circuit memory devices with unidirectional ports for concurrent interface operations

Inter-server memory pooling

Memory module with memory-ownership exchange

Error remapping

Low overhead page recompression

Data buffer for memory devices with unidirectional ports

Compression via deallocation

Page table manager

Memory controller systems with nonvolatile memory for storing operating parameters

Data buffer for memory devices with unidirectional ports

Error remapping

System and method for memory access in server communications

Heterogenous-latency memory optimization

Error remapping

Memory controller systems with nonvolatile memory for storing operating parameters

System and method for memory access in server communications

INPHI CORP

Memory centric computing

Memory controller system with non-volatile backup storage

Memory buffer with data scrambling and error correction

Memory buffer with one or more auxiliary interfaces

Hybrid memory blade

Memory buffer with one or more auxiliary interfaces

Systems and methods for error detection and correction in a memory module which includes a memory buffer

HAYWOOD CHRISTOPHER

Load reduction system and method for DIMM-based memory systems

Methods and apparatus for transferring data between memory modules

Memory buffer with one or more auxiliary interfaces

Redriven/retimed registered dual inline memory module

CIT ALCATEL

Dedicated bandwidth data communication switch backplane

Receive processing for dedicated bandwidth data communication switch backplane

XYLAN CORP

Integrated circuit with stage-implemented content-addressable memory cell

WANG DAVID

Systems and methods for error detection and correction in a memory module which includes a memory buffer

ALCATEL INTERNETWORKING INC

Receive processing for dedicated bandwidth data communication switch backplane