Inventor
CHOU KUN-I
TW6 patents
Patents
6 patentsUS11737285B2Aug 22, 2023
Memory array having strap region with staggered dummy magnetic storage elements
UNITED MICROELECTRONICS CORP2 citations72
US11011210B2May 18, 2021
Memory layout structure
UNITED MICROELECTRONICS CORP5 citations72
US9202701B1Dec 1, 2015
Method for manufacturing silicon—oxide—nitride—oxide—silicon (SONOS) non-volatile memory cell
UNITED MICROELECTRONICS CORP6 citations67
US11715499B2Aug 1, 2023
MRAM structure with source lines having alternating branches at opposite sides and storage units in staggered arrangement
UNITED MICROELECTRONICS CORP0 citations62
US10636841B2Apr 28, 2020
Magnetoresistive random access memory
UNITED MICROELECTRONICS CORP0 citations50
US9412851B2Aug 9, 2016
Method for fabricating semiconductor device including a patterned multi-layered dielectric film with an exposed edge
UNITED MICROELECTRONICS CORP0 citations47