Inventor
TAKEYAMA HIROJI
JP6 patents
Patents
6 patentsUS6678871B2Jan 13, 2004
Circuit designing apparatus, circuit designing method and timing distribution apparatus
FUJITSU LTD54 citations93
US7086016B2Aug 1, 2006
Method and apparatus for verifying logical equivalency between logic circuits
FUJITSU LTD19 citations92
US6618834B2Sep 9, 2003
Circuit designing apparatus, circuit designing method and timing distribution apparatus
FUJITSU LTD37 citations90
US7143375B2Nov 28, 2006
Logical equivalence verifying device, method and computer readable medium thereof
FUJITSU LTD6 citations71
US7337414B2Feb 26, 2008
Logical equivalence verifying device, method, and computer-readable medium thereof
FUJITSU LTD4 citations60
US6473874B1Oct 29, 2002
Method and system for managing timing error information
FUJITSU LTD0 citations39