Inventor

LENOSKI DANIEL E

US31 patents

⚠️ This page may combine multiple inventors who share the name “LENOSKI DANIEL E”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LENOSKI DANIEL E

SILICON GRAPHICS INC

High memory capacity DIMM with data and state memory

Apparatus and method for page migration in a non-uniform memory access (NUMA) system

System and method for maintaining coherency of virtual-to-physical memory translations in a multiprocessor computer

High-memory capacity DIMM with data and state memory

System and method for multiprocessor partitioning to support high availability

System and method for input/output flow control in a multiprocessor computer system

System and method for maintaining coherency of virtual-to-physical memory translations in a multiprocessor computer

Dimm pair with data memory and state memory

Hierarchical fat hypercube architecture for parallel processing systems

Cache coherency using flexible directory bit vectors

Distributed global clock system

System and method for the synchronous transmission of data in a communication network utilizing a source clock signal to latch serial data into first registers and a handshake signal to latch parallel data into second registers

Providing shared and non-shared access to memory in a system with plural processor coherence domains

Method and system for managing memory in a multiprocessor system

Method and system for maintaining data at input/output (I/O) interfaces for a multiprocessor system

TANDEM COMPUTERS INC

System to determine if modification of first macroinstruction to execute in fewer clock cycles

Method and apparatus for modifying micro-instructions using a macro-instruction pipeline

Stack with unary encoded stack pointer

Synchronous processor unit with interconnected, separately clocked processor sections which are automatically synchronized for data transfer operations

Diagnostic apparatus for a data processing system

Cross-coupled checking circuit

System for performing group relative addressing

Entry point mapping and skipping method and apparatus

Microcoded microprocessor with shared ram

CISCO TECH IND

Resequencing packets at output ports without errors using packet timestamps and timestamp floors

Method and apparatus for accumulating and distributing data items within a packet switching system

Method and apparatus for distributing packets across multiple paths leading to a destination

Method and apparatus for reducing the required size of sequence numbers used in resequencing packets

UNIV WASHINGTON

Distributing fault indications and maintaining and using a data structure indicating faults to route traffic in a packet switching system

CISCO TECH INC

Input-output module, processing platform and method for extending a memory interface for input-output operations

SUN MICROSYSTEMS INC

Computer system with a shared address bus and pipelined write operations