Inventor
HINRICHS WILLM
DE19 patents
Patents
19 patentsUS9619385B2Apr 11, 2017
Single thread cache miss rate estimation
IBM3 citations73
US10949351B2Mar 16, 2021
Bits register for synonyms in a memory system
IBM1 citations72
US9886395B2Feb 6, 2018
Evicting cached stores
IBM2 citations72
US9658967B2May 23, 2017
Evicting cached stores
IBM2 citations72
US8363487B2Jan 29, 2013
Method, system, computer program product, and data processing device for monitoring memory circuits and corresponding integrated circuit
IBM6 citations72
US10970214B2Apr 6, 2021
Selective downstream cache processing for data access
IBM0 citations62
US10956328B2Mar 23, 2021
Selective downstream cache processing for data access
IBM0 citations62
US8055931B2Nov 8, 2011
Method for switching between two redundant oscillator signals within an alignment element
IBM3 citations61
US9626293B2Apr 18, 2017
Single-thread cache miss rate estimation
IBM0 citations52
US7983372B2Jul 19, 2011
Method, system and computer program product for an even sampling spread over differing clock domain boundaries
IBM0 citations52
US7881906B2Feb 1, 2011
Method, system and computer program product for event-based sampling to monitor computer system performance
IBM1 citations52
US10417127B2Sep 17, 2019
Selective downstream cache processing for data access
IBM0 citations51
US10409724B2Sep 10, 2019
Selective downstream cache processing for data access
IBM0 citations51
US10324846B2Jun 18, 2019
Bits register for synonyms in a memory system
IBM0 citations51
US10324847B2Jun 18, 2019
Bits register for synonyms in a memory system
IBM0 citations51
US9588893B2Mar 7, 2017
Store cache for transactional memory
IBM0 citations51
US9588894B2Mar 7, 2017
Store cache for transactional memory
IBM0 citations51
US11775444B1Oct 3, 2023
Fetch request arbiter
IBM0 citations46
US9104364B2Aug 11, 2015
Generation and distribution of steered time interval pulse to a plurality of hardware components of the computing system
IBM0 citations38