Inventor
LO JACK SIU CHEUNG
US4 patents
Patents
4 patentsUS6744289B2Jun 1, 2004
Clock divider circuit with duty cycle correction and minimal additional delay
XILINX INC31 citations90
US6362669B1Mar 26, 2002
Structure and method for initializing IC devices during unstable power-up
XILINX INC32 citations90
US6864727B2Mar 8, 2005
Pulse generator with polarity control
XILINX INC2 citations61
US6456126B1Sep 24, 2002
Frequency doubler with polarity control
XILINX INC2 citations61