Inventor

YAMAUCHI HIROMASA

JP113 patents

⚠️ This page may combine multiple inventors who share the name “YAMAUCHI HIROMASA”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

YAMAUCHI HIROMASA

FUJITSU LTD

Communications node, system, and synchronizing method

Scheduling method and multi-core processor system

Multi-core processor system, control program, and control method

Multi-core processor system, cache coherency control method, and computer product

Distributed processing method, system, and computer product

Information processing method, communications method, communications node, system, and computer product

Data collection method, system, and computer product

Exclusive access control method prohibiting attempt to access a shared resource based on average number of attempts and predetermined threshold

Communications network control method, computer product, and system

Multi-core processor system, synchronization control system, synchronization control apparatus, information generating method, and computer product

Communication apparatus, load distribution method, and recording medium

Information processing apparatus, method and non-transitory computer-readable storage medium

Multi-core system and scheduling method

Multi-core processor system, monitoring control method, and computer product

Interrupt assigning method, interrupt control method, and system therefor

Multi-core processor system, computer product, and control method for interrupt execution

Installation location determination device and method for installation location determination of radio device

Detection apparatus, notification method, and computer product

Data network management system, data network management apparatus, data processing apparatus, and data network management method

Multicore processor system, computer product, assigning method, and control method

Communication device

Position estimation method, system, and position estimation apparatus

Communications apparatus, communications system, and communications method

Scheduling method and task processing method

Determining method, computer product, determining apparatus, and determining system

Data processing system and scheduling method

Thread processing method for using a multi-core processor and systems therefor

Data processor

Multi-core processor system, control program, and control method

Method and system for setting power supply mode of a multiple-core processor system based on condition of a time bin during a number of time intervals within the time bin is equal to or larger than a second threshold

Data processing system and scheduling method

Scheduler, multi-core processor system, and scheduling method

Multi-core processor system, cache coherency control method, and computer product

Data allocation method and data allocation system

Interrupt monitoring system and computer system

Memory access controller, multi-core processor system, memory access control method, and computer product

Processor management method

Program executing method

Communication method and communications apparatus

Data processing apparatus, transmitting apparatus, transmission control method, scheduling method, and computer product

Data processing method and data processing system

Converting apparatus, conversion method, and information processing system

Resetting a peripheral driver and prohibiting writing into a register retaining data to be written into a peripheral on exceeding a predetermined time period

Multicore processor system, computer product, and control method

Data transfer control apparatus, data transfer control method, and computer product

Multi-core processor system, computer product, and control method

Interrupt control method and multicore processor system

Information processing system

YAMASHITA KOICHIRO

Controlling memory access conflict of threads on multi-core processor with set of highest priority processor cores based on a threshold value of issued-instruction efficiency

Multicore processor system, computer product, and notification method for updating operating system