Inventor
NALLA PRAVEEN
US12 patents
Patents
12 patentsUS9837312B1Dec 5, 2017
Atomic layer etching for enhanced bottom-up feature fill
LAM RES CORP48 citations93
US10262943B2Apr 16, 2019
Interlevel conductor pre-fill utilizing selective barrier deposition
LAM RES CORP7 citations83
US9583386B2Feb 28, 2017
Interlevel conductor pre-fill utilizing selective barrier deposition
LAM RES CORP8 citations83
US9287183B1Mar 15, 2016
Using electroless deposition as a metrology tool to highlight contamination, residue, and incomplete via etch
LAM RES CORP11 citations83
US9875968B2Jan 23, 2018
Interlevel conductor pre-fill utilizing selective barrier deposition
LAM RES CORP2 citations72
US9768063B1Sep 19, 2017
Dual damascene fill
LAM RES CORP5 citations71
US7709400B2May 4, 2010
Thermal methods for cleaning post-CMP wafers
LAM RES CORP2 citations62
US9353444B2May 31, 2016
Two-step deposition with improved selectivity
LAM RES CORP0 citations52
US10103056B2Oct 16, 2018
Methods for wet metal seed deposition for bottom up gapfill of features
LAM RES CORP0 citations51
US7884017B2Feb 8, 2011
Thermal methods for cleaning post-CMP wafers
LAM RES CORP0 citations51
US9818617B2Nov 14, 2017
Method of electroless plating using a solution with at least two borane containing reducing agents
LAM RES CORP0 citations48
US9551074B2Jan 24, 2017
Electroless plating solution with at least two borane containing reducing agents
LAM RES CORP0 citations48