Inventor
LU NICKY C
US19 patents
⚠️ This page may combine multiple inventors who share the name “LU NICKY C”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
15 patentsUS5021355AJun 4, 1991
Method of fabricating cross-point lightly-doped drain-source trench transistor
IBM242 citations99
US5198995AMar 30, 1993
Trench-capacitor-one-transistor storage cell and array for dynamic random access memories
IBM71 citations96
US4922128AMay 1, 1990
Boost clock circuit for driving redundant wordlines and sample wordlines
IBM82 citations96
US4881105ANov 14, 1989
Integrated trench-transistor structure and fabrication process
IBM126 citations96
US4833516AMay 23, 1989
High density memory cell structure having a vertical trench transistor self-aligned with a vertical trench capacitor and fabrication methods therefor
IBM83 citations96
US4816884AMar 28, 1989
High density vertical trench transistor and capacitor memory cell structure and fabrication method therefor
IBM60 citations96
US4728623AMar 1, 1988
Fabrication method for forming a self-aligned contact window and connection in an epitaxial layer and device structures employing the method
IBM80 citations96
US4688063AAug 18, 1987
Dynamic ram cell with MOS trench capacitor in CMOS
IBM82 citations96
US4649625AMar 17, 1987
Dynamic memory device having a single-crystal transistor on a trench capacitor structure and a fabrication method therefor
IBM124 citations96
US4983544AJan 8, 1991
Silicide bridge contact process
IBM103 citations93
US4954731ASep 4, 1990
Wordline voltage boosting circuits for complementary MOSFET dynamic memories
IBM27 citations92
US4927779AMay 22, 1990
Complementary metal-oxide-semiconductor transistor and one-capacitor dynamic-random-access memory cell and fabrication process therefor
IBM38 citations92
US4910709AMar 20, 1990
Complementary metal-oxide-semiconductor transistor and one-capacitor dynamic-random-access memory cell
IBM51 citations92
US4754433AJun 28, 1988
Dynamic ram having multiplexed twin I/O line pairs
IBM38 citations91
US4639622AJan 27, 1987
Boosting word-line clock circuit for semiconductor memory
IBM39 citations86
ETRON TECHNOLOGY INC
3 patentsUS6107134AAug 22, 2000
High performance DRAM structure employing multiple thickness gate oxide
ETRON TECHNOLOGY INC50 citations95
US6009023ADec 28, 1999
High performance DRAM structure employing multiple thickness gate oxide
ETRON TECHNOLOGY INC60 citations95
US6097641AAug 1, 2000
High performance DRAM structure employing multiple thickness gate oxide
ETRON TECHNOLOGY INC13 citations81