P

Inventor

CHAO LIANG-JIH

US7 patents
⚠️ This page may combine multiple inventors who share the name “CHAO LIANG-JIH”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CADENCE DESIGN SYSTEMS INC

4 patents
US7036101B2Apr 25, 2006

Method and apparatus for scalable interconnect solution

CADENCE DESIGN SYSTEMS INC54 citations94
US9177093B2Nov 3, 2015

Routing interconnect of integrated circuit designs with varying grid densities

CADENCE DESIGN SYSTEMS INC4 citations71
US8386984B2Feb 26, 2013

Interconnect routing methods of integrated circuit designs

CADENCE DESIGN SYSTEMS INC3 citations61
US8365128B2Jan 29, 2013

Routing interconnect of integrated circuit designs

CADENCE DESIGN SYSTEMS INC2 citations61

HE LIMIN

2 patents
US8291365B2Oct 16, 2012

Conditionally routing a portion of an integrated circuit design with a different pitch to overcome a design rule violation

HE LIMIN2 citations59
US8255857B2Aug 28, 2012

Routing methods for integrated circuit designs

HE LIMIN3 citations59

(unassigned)

1 patent
US6367060B1Apr 2, 2002

Method and apparatus for clock tree solution synthesis based on design constraints

62 citations87