Inventor
FARMWALD MICHAEL
US56 patents
Patents
50 patentsUS7110322B2Sep 19, 2006
Memory module including an integrated circuit device
RAMBUS INC67 citations99
US6807598B2Oct 19, 2004
Integrated circuit device having double data rate capability
RAMBUS INC83 citations99
US6751696B2Jun 15, 2004
Memory device having a programmable register
RAMBUS INC106 citations99
US6697295B2Feb 24, 2004
Memory device having a programmable register
RAMBUS INC106 citations99
US6584037B2Jun 24, 2003
Memory device which samples data after an amount of time transpires
RAMBUS INC135 citations99
US6564281B2May 13, 2003
Synchronous memory device having automatic precharge
RAMBUS INC75 citations99
US6378020B2Apr 23, 2002
System having double data transfer rate and intergrated circuit therefor
RAMBUS INC95 citations99
US6314051B1Nov 6, 2001
Memory device having write latency
RAMBUS INC149 citations99
US6266285B1Jul 24, 2001
Method of operating a memory device having write latency
RAMBUS INC146 citations99
US6260097B1Jul 10, 2001
Method and apparatus for controlling a synchronous memory device
RAMBUS INC135 citations99
US6185644B1Feb 6, 2001
Memory system including a plurality of memory devices and a transceiver device
RAMBUS INC228 citations99
US6182184B1Jan 30, 2001
Method of operating a memory device having a variable data input length
RAMBUS INC116 citations99
US6101152AAug 8, 2000
Method of operating a synchronous memory device
RAMBUS INC174 citations99
US6038195AMar 14, 2000
Synchronous memory device having a delay time register and method of operating same
RAMBUS INC147 citations99
US6034918AMar 7, 2000
Method of operating a memory having a variable data output length and a programmable register
RAMBUS INC145 citations99
US6035365AMar 7, 2000
Dual clocked synchronous memory device having a delay time register and method of operating same
RAMBUS INC134 citations99
US6032215AFeb 29, 2000
Synchronous memory device utilizing two external clocks
RAMBUS INC107 citations99
US6032214AFeb 29, 2000
Method of operating a synchronous memory device having a variable data output length
RAMBUS INC160 citations99
US5954804ASep 21, 1999
Synchronous memory device having an internal register
RAMBUS INC183 citations99
US5953263ASep 14, 1999
Synchronous memory device having a programmable register and method of controlling same
RAMBUS INC158 citations99
US5928343AJul 27, 1999
Memory module having memory devices containing internal device ID registers and method of initializing same
RAMBUS INC343 citations99
US5915105AJun 22, 1999
Integrated circuit I/O using a high performance bus interface
RAMBUS INC159 citations99
US5841580ANov 24, 1998
Integrated circuit I/O using a high performance bus interface
RAMBUS INC115 citations99
US5657481AAug 12, 1997
Memory device with a phase locked loop circuitry
RAMBUS INC161 citations99
US5638334AJun 10, 1997
Integrated circuit I/O using a high performance bus interface
RAMBUS INC258 citations99
US5606717AFeb 25, 1997
Memory circuitry having bus interface for receiving information in packets and access time registers
RAMBUS INC441 citations99
US5513327AApr 30, 1996
Integrated circuit I/O using a high performance bus interface
RAMBUS INC271 citations99
US5473575ADec 5, 1995
Integrated circuit I/O using a high performance bus interface
RAMBUS INC117 citations99
US5319755AJun 7, 1994
Integrated circuit I/O using high performance bus interface
RAMBUS INC472 citations99
US5243703ASep 7, 1993
Apparatus for synchronously generating clock signals in a data processing system
RAMBUS INC570 citations99
US6426916B2Jul 30, 2002
Memory device having a variable data output length and a programmable register
RAMBUS INC98 citations98
US5995443ANov 30, 1999
Synchronous memory device
RAMBUS INC134 citations98
US6598171B1Jul 22, 2003
Integrated circuit I/O using a high performance bus interface
RAMBUS INC32 citations97
US6546446B2Apr 8, 2003
Synchronous memory device having automatic precharge
RAMBUS INC73 citations97
US6452863B2Sep 17, 2002
Method of operating a memory device having a variable data input length
RAMBUS INC74 citations97
US6415339B1Jul 2, 2002
Memory device having a plurality of programmable internal registers and a delay time register
RAMBUS INC38 citations97
US6304937B1Oct 16, 2001
Method of operation of a memory controller
RAMBUS INC56 citations97
US6085284AJul 4, 2000
Method of operating a memory device having a variable data output length and an identification register
RAMBUS INC38 citations97
US6067592AMay 23, 2000
System having a synchronous memory device
RAMBUS INC78 citations97
US6049846AApr 11, 2000
Integrated circuit having memory which synchronously samples information with respect to external clock signals
RAMBUS INC51 citations97
US5809263ASep 15, 1998
Integrated circuit I/O using a high performance bus interface
RAMBUS INC50 citations97
US5499385AMar 12, 1996
Method for accessing and transmitting data to/from a memory in packets
RAMBUS INC67 citations97
US5408129AApr 18, 1995
Integrated circuit I/O using a high performance bus interface
RAMBUS INC80 citations97
US6570814B2May 27, 2003
Integrated circuit device which outputs data after a latency period transpires
RAMBUS INC14 citations96
US6324120B2Nov 27, 2001
Memory device having a variable data output length
RAMBUS INC81 citations96
US6128696AOct 3, 2000
Synchronous memory device utilizing request protocol and method of operation of same
RAMBUS INC18 citations96
US6070222AMay 30, 2000
Synchronous memory device having identification register
RAMBUS INC24 citations96
US6044426AMar 28, 2000
Memory system having memory devices each including a programmable internal register
RAMBUS INC21 citations96
US5841715ANov 24, 1998
Integrated circuit I/O using high performance bus interface
RAMBUS INC17 citations96
US6728819B2Apr 27, 2004
Synchronous memory device
RAMBUS INC27 citations93
Showing the top 50 of 56 patents by PatentIndex Score.