Inventor
RAMESH SUBRAMANIAN
US39 patents
⚠️ This page may combine multiple inventors who share the name “RAMESH SUBRAMANIAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
LSI LOGIC CORP
17 patentsUS8044437B1Oct 25, 2011
Integrated circuit cell architecture configurable for memory or logic elements
LSI LOGIC CORP115 citations98
US6980462B1Dec 27, 2005
Memory cell architecture for reduced routing congestion
LSI LOGIC CORP58 citations96
US6166403ADec 26, 2000
Integrated circuit having embedded memory with electromagnetic shield
LSI LOGIC CORP72 citations96
US7006370B1Feb 28, 2006
Memory cell architecture
LSI LOGIC CORP50 citations92
US6259146B1Jul 10, 2001
Self-aligned fuse structure and method with heat sink
LSI LOGIC CORP26 citations92
US6218276B1Apr 17, 2001
Silicide encapsulation of polysilicon gate and interconnect
LSI LOGIC CORP28 citations92
US6061264AMay 9, 2000
Self-aligned fuse structure and method with anti-reflective coating
LSI LOGIC CORP18 citations92
US5953614ASep 14, 1999
Process for forming self-aligned metal silicide contacts for MOS structure using single silicide-forming step
LSI LOGIC CORP48 citations92
US6778462B1Aug 17, 2004
Metal-programmable single-port SRAM array for dual-port functionality
LSI LOGIC CORP38 citations89
US6413848B1Jul 2, 2002
Self-aligned fuse structure and method with dual-thickness dielectric
LSI LOGIC CORP14 citations84
US6037233AMar 14, 2000
Metal-encapsulated polysilicon gate and interconnect
LSI LOGIC CORP18 citations84
US6977512B2Dec 20, 2005
Method and apparatus for characterizing shared contacts in high-density SRAM cell design
LSI LOGIC CORP13 citations83
US6066525AMay 23, 2000
Method of forming DRAM capacitor by forming separate dielectric layers in a CMOS process
LSI LOGIC CORP15 citations74
US6162714ADec 19, 2000
Method of forming thin polygates for sub quarter micron CMOS process
LSI LOGIC CORP7 citations72
US7006369B2Feb 28, 2006
Design and use of a spacer cell to support reconfigurable memories
LSI LOGIC CORP7 citations68
US6934174B2Aug 23, 2005
Reconfigurable memory arrays
LSI LOGIC CORP5 citations63
US6978407B2Dec 20, 2005
Method and architecture for detecting random and systematic transistor degradation for transistor reliability evaluation in high-density memory
LSI LOGIC CORP4 citations57
DATAGUISE INC
9 patentsUS9268947B1Feb 23, 2016
Method and system for managing information associated with sensitive information in an enterprise
DATAGUISE INC70 citations92
US10878124B1Dec 29, 2020
Systems and methods for detecting sensitive information using pattern recognition
DATAGUISE INC31 citations91
US9465954B1Oct 11, 2016
Method and system for tracking masking of data
DATAGUISE INC19 citations75
US11288246B1Mar 29, 2022
Ascribing a confidence factor for identifying a given column in a structured dataset belonging to a particular sensitive type
DATAGUISE INC1 citations67
US12204514B2Jan 21, 2025
Ascribing a confidence factor for identifying a given column in a structured dataset belonging to a particular sensitive type
DATAGUISE INC0 citations57
US11762824B2Sep 19, 2023
Ascribing a confidence factor for identifying a given column in a structured dataset belonging to a particular sensitive type
DATAGUISE INC0 citations57
US12386790B2Aug 12, 2025
Method and system for managing and securing subsets of data in a large distributed data store
DATAGUISE INC0 citations56
US11803519B2Oct 31, 2023
Method and system for managing and securing subsets of data in a large distributed data store
DATAGUISE INC0 citations56
US11010348B2May 18, 2021
Method and system for managing and securing subsets of data in a large distributed data store
DATAGUISE INC0 citations56
HEWLETT PACKARD DEVELOPMENT CO
4 patentsUS7114064B2Sep 26, 2006
System and method for accessing an advanced configuration and power interface (ACPI) namespace nodal tree
HEWLETT PACKARD DEVELOPMENT CO22 citations92
US7007160B1Feb 28, 2006
System and method for loading an advanced configuration and power interface (ACPI) original equipment manufacturer (OEM) description table
HEWLETT PACKARD DEVELOPMENT CO15 citations83
US6865614B2Mar 8, 2005
Method for transferring a packed data structure to an unpacked data structure by copying the packed data using pointer
HEWLETT PACKARD DEVELOPMENT CO13 citations83
US6963970B2Nov 8, 2005
System and method for executing a fast reset of a computer system
HEWLETT PACKARD DEVELOPMENT CO7 citations71
LSI CORP
3 patentsVENKATRAMAN RAMNATH
3 patentsUS8178909B2May 15, 2012
Integrated circuit cell architecture configurable for memory or logic elements
VENKATRAMAN RAMNATH115 citations96
US8429586B2Apr 23, 2013
Basic cell architecture for structured ASICs
VENKATRAMAN RAMNATH5 citations80
US8166440B1Apr 24, 2012
Basic cell architecture for structured application-specific integrated circuits
VENKATRAMAN RAMNATH0 citations50