Inventor
OLSON CHRISTOPHER HANS
US16 patents
Patents
16 patentsUS5961636AOct 5, 1999
Checkpoint table for selective instruction flushing in a speculative execution unit
IBM99 citations95
US5880983AMar 9, 1999
Floating point split multiply/add system which has infinite precision
IBM64 citations94
US5826070AOct 20, 1998
Apparatus and method for maintaining status flags and condition codes using a renaming technique in an out of order floating point execution unit
IBM75 citations94
US5822758AOct 13, 1998
Method and system for high performance dynamic and user programmable cache arbitration
IBM65 citations94
US5790444AAug 4, 1998
Fast alignment unit for multiply-add floating point unit
IBM23 citations92
US5790445AAug 4, 1998
Method and system for performing a high speed floating point add operation
IBM29 citations91
US5794024AAug 11, 1998
Method and system for dynamically recovering a register-address-table upon occurrence of an interrupt or branch misprediction
IBM34 citations90
US5878242AMar 2, 1999
Method and system for forwarding instructions in a processor with increased forwarding probability
IBM18 citations82
US6484251B1Nov 19, 2002
Updating condition status register based on instruction specific modification information in set/clear pair upon instruction commit in out-of-order processor
IBM12 citations73
US5822556AOct 13, 1998
Distributed completion control in a microprocessor
IBM10 citations73
US5742784AApr 21, 1998
System for reordering of instructions before placement into cache to reduce dispatch latency
IBM10 citations73
US6032249AFeb 29, 2000
Method and system for executing a serializing instruction while bypassing a floating point unit pipeline
IBM7 citations72
US5943494AAug 24, 1999
Method and system for processing multiple branch instructions that write to count and link registers
IBM8 citations72
US5815406ASep 29, 1998
Method and system for designing a circuit using RC and timing weighting of nets
IBM16 citations72
US5805487ASep 8, 1998
Method and system for fast determination of sticky and guard bits
IBM4 citations61
US5802346ASep 1, 1998
Method and system for minimizing the delay in executing branch-on-register instructions
IBM1 citations51