Inventor
WU KOUCHENG
US22 patents
⚠️ This page may combine multiple inventors who share the name “WU KOUCHENG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
WU KOUCHENG
7 patentsUS7936040B2May 3, 2011
Schottky barrier quantum well resonant tunneling transistor
WU KOUCHENG26 citations92
US7042044B2May 9, 2006
Nor-type channel-program channel-erase contactless flash memory on SOI
WU KOUCHENG17 citations92
US7495283B2Feb 24, 2009
Nor-type channel-program channel-erase contactless flash memory on SOI
WU KOUCHENG5 citations73
US11903331B2Feb 13, 2024
Digital circuits comprising quantum wire resonant tunneling transistors
WU KOUCHENG0 citations62
US11496072B2Nov 8, 2022
Device and method for work function reduction and thermionic energy conversion
WU KOUCHENG0 citations62
US11133384B1Sep 28, 2021
Quantum wire resonant tunneling transistor
WU KOUCHENG0 citations62
US6963121B2Nov 8, 2005
Schottky-barrier tunneling transistor
WU KOUCHENG5 citations62
APLUS FLASH TECHNOLOGY INC
6 patentsUS6862223B1Mar 1, 2005
Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout
APLUS FLASH TECHNOLOGY INC130 citations99
US7110302B2Sep 19, 2006
Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout
APLUS FLASH TECHNOLOGY INC25 citations96
US7102929B2Sep 5, 2006
Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout
APLUS FLASH TECHNOLOGY INC51 citations96
US7075826B2Jul 11, 2006
Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout
APLUS FLASH TECHNOLOGY INC28 citations96
US7324384B2Jan 29, 2008
Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout
APLUS FLASH TECHNOLOGY INC18 citations92
US7120064B2Oct 10, 2006
Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout
APLUS FLASH TECHNOLOGY INC15 citations92
VLSI TECHNOLOGY INC
3 patentsUS5793640AAug 11, 1998
Capacitance measurement using an RLC circuit model
VLSI TECHNOLOGY INC39 citations92
US5773317AJun 30, 1998
Test structure and method for determining metal-oxide-silicon field effect transistor fringing capacitance
VLSI TECHNOLOGY INC34 citations92
US5753540AMay 19, 1998
Apparatus and method for programming antifuse structures
VLSI TECHNOLOGY INC7 citations73