Inventor
WANG MING-HUNG
TW30 patents
⚠️ This page may combine multiple inventors who share the name “WANG MING-HUNG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
ETRON TECHNOLOGY INC
16 patentsUS7054178B1May 30, 2006
Datapath architecture for high area efficiency
ETRON TECHNOLOGY INC425 citations96
US7404116B2Jul 22, 2008
Semiconductor integrated circuit with full-speed data transition scheme for DDR SDRAM at internally doubled clock testing application
ETRON TECHNOLOGY INC12 citations92
US7292083B1Nov 6, 2007
Comparator circuit with Schmitt trigger hysteresis character
ETRON TECHNOLOGY INC22 citations92
US7031219B2Apr 18, 2006
Internal power management scheme for a memory chip in deep power down mode
ETRON TECHNOLOGY INC25 citations92
US6198340B1Mar 6, 2001
High efficiency CMOS pump circuit
ETRON TECHNOLOGY INC35 citations92
US6130853AOct 10, 2000
Address decoding scheme for DDR memory
ETRON TECHNOLOGY INC39 citations92
US7551018B2Jun 23, 2009
Decoupling capacitor circuit
ETRON TECHNOLOGY INC8 citations84
US7292494B2Nov 6, 2007
Internal power management scheme for a memory chip in deep power down mode
ETRON TECHNOLOGY INC15 citations84
US7634698B2Dec 15, 2009
Semiconductor integrated circuit with full-speed data transition scheme for DDR SDRAM at internally doubled clock testing application
ETRON TECHNOLOGY INC3 citations63
US7262784B2Aug 28, 2007
LCD controller to hold a fixed image aspect ratio
ETRON TECHNOLOGY INC6 citations63
US6856358B1Feb 15, 2005
Phase-increase induced backporch decrease (PIBD) phase recovery method for video signal processing
ETRON TECHNOLOGY INC2 citations63
US7796463B2Sep 14, 2010
Self-feedback control pipeline architecture for memory read path applications
ETRON TECHNOLOGY INC4 citations62
US7391656B2Jun 24, 2008
Self-feedback control pipeline architecture for memory read path applications
ETRON TECHNOLOGY INC4 citations62
US7676708B2Mar 9, 2010
Semiconductor integrated circuit with full-speed data transition scheme for DDR SDRAM at internally doubled clock testing application
ETRON TECHNOLOGY INC0 citations52
US7613962B2Nov 3, 2009
Semiconductor integrated circuit with full-speed data transition scheme for DDR SDRAM at internally doubled clock testing application
ETRON TECHNOLOGY INC0 citations52
US6922192B2Jul 26, 2005
Wide-range and balanced display position adjustment method for LCD controller
ETRON TECHNOLOGY INC0 citations52
PIECEMAKERS TECH INC
8 patentsUS11183231B2Nov 23, 2021
Apparatus for enhancing prefetch access in memory module
PIECEMAKERS TECH INC4 citations72
US11721390B2Aug 8, 2023
DRAM with inter-section, page-data-copy scheme for low power and wide data access
PIECEMAKERS TECH INC0 citations62
US11250904B1Feb 15, 2022
DRAM with inter-section, page-data-copy scheme for low power and wide data access
PIECEMAKERS TECH INC0 citations62
US11437087B2Sep 6, 2022
Method and apparatus for accumulating and storing respective access counts of word lines in memory module
PIECEMAKERS TECH INC1 citations59
US11755685B2Sep 12, 2023
Apparatus for data processing in conjunction with memory array access
PIECEMAKERS TECH INC0 citations55
US12488858B2Dec 2, 2025
Method and circuitry for handling defective memory cells and wordlines in memory module
PIECEMAKERS TECH INC0 citations51
US9653148B1May 16, 2017
Multi-bank memory device and system
PIECEMAKERS TECH INC1 citations51
US9997224B2Jun 12, 2018
Memory architecture with multi-bank memory cell array accessed by local drive circuit within memory bank
PIECEMAKERS TECH INC0 citations41