Inventor

WIEDEMEIER JEFF

US8 patents

⚠️ This page may combine multiple inventors who share the name “WIEDEMEIER JEFF”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

WIEDEMEIER JEFF

3 patents

US9141386B2Sep 22, 2015

Vector logical reduction operation implemented using swizzling on a semiconductor chip

WIEDEMEIER JEFF10 citations81

US8667042B2Mar 4, 2014

Functional unit for vector integer multiply add instruction

WIEDEMEIER JEFF13 citations81

US9092213B2Jul 28, 2015

Functional unit for vector leading zeroes, vector trailing zeroes, vector operand 1s count and vector parity calculation

WIEDEMEIER JEFF2 citations60

INTEL CORP

2 patents

US9323942B2Apr 26, 2016

Protecting information processing system secrets from debug attacks

INTEL CORP0 citations51

US10255196B2Apr 9, 2019

Method and apparatus for sub-page write protection

INTEL CORP0 citations40

SHANBHOGUE VEDVYAS

1 patent

US8955144B2Feb 10, 2015

Protecting information processing system secrets from debug attacks

SHANBHOGUE VEDVYAS0 citations50

NATU MAHESH S

1 patent

US8301907B2Oct 30, 2012

Supporting advanced RAS features in a secured computing system

NATU MAHESH S1 citations50

KOU LEIGANG

1 patent

US9063860B2Jun 23, 2015

Method and system for optimizing prefetching of cache memory lines

KOU LEIGANG1 citations36