Inventor

CHOU CHE-WEI

TW3 patents

⚠️ This page may combine multiple inventors who share the name “CHOU CHE-WEI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IND TECH RES INST

1 patent

US9406401B2Aug 2, 2016

3-D memory and built-in self-test circuit thereof

IND TECH RES INST10 citations79

MEDIATEK INC

1 patent

US12482529B2Nov 25, 2025

Memory with built-in synchronous-write-through redundancy and associated test method

MEDIATEK INC0 citations56

UNIV NAT CENTRAL

1 patent

US10209298B2Feb 19, 2019

Delay measurement circuit and measuring method thereof

UNIV NAT CENTRAL1 citations51