Inventor
AGRAWAL SHIVAM
IN3 patents
Patents
3 patentsUS11588489B1Feb 21, 2023
Obtaining lock in a phase-locked loop (PLL) upon being out of phase-lock
SHAOXING YUANFANG SEMICONDUCTOR CO LTD5 citations71
US12149255B2Nov 19, 2024
Generating divided signals from phase-locked loop (PLL) output when reference clock is unavailable
SHAOXING YUANFANG SEMICONDUCTOR CO LTD0 citations57
US11967965B2Apr 23, 2024
Generating divided signals from phase-locked loop (PLL) output when reference clock is unavailable
SHAOXING YUANFANG SEMICONDUCTOR CO LTD0 citations57