Inventor
MANAKER JR WALTER A
US10 patents
Patents
10 patentsUS5659484AAug 19, 1997
Frequency driven layout and method for field programmable gate arrays
XILINX INC317 citations95
US7657855B1Feb 2, 2010
Efficient timing graph update for dynamic netlist changes
XILINX INC57 citations94
US5648913AJul 15, 1997
Frequency driven layout system and method for field programmable gate arrays
XILINX INC97 citations93
US7475297B1Jan 6, 2009
Efficient method for computing clock skew without pessimism
XILINX INC14 citations83
US7472365B1Dec 30, 2008
Method for computing hold and setup slack without pessimism
XILINX INC15 citations83
US9842187B1Dec 12, 2017
Representation of complex timing characteristics of startpoint-endpoint pairs in a circuit design
XILINX INC9 citations82
US7451417B1Nov 11, 2008
Timing annotation accuracy through the use of static timing analysis tools
XILINX INC10 citations81
US7284219B1Oct 16, 2007
Representation of a relaxation of a constraint by graph replication
XILINX INC12 citations76
US7137090B1Nov 14, 2006
Path slack phase adjustment
XILINX INC10 citations72
US7421675B1Sep 2, 2008
Annotating timing information for a circuit design for increased timing accuracy
XILINX INC5 citations60