Inventor

GARLEPP BRUNO W

US84 patents

⚠️ This page may combine multiple inventors who share the name “GARLEPP BRUNO W”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

GARLEPP BRUNO W

RAMBUS INC

Calibrated data communication system and method

Partial response receiver

Low latency multi-level communication interface

Calibrated data communication system and method

Integrated circuit with timing adjustment mechanism and method

Bus system optimization

Delay locked loop circuitry for clock delay adjustment

Delay-locked loop circuitry for clock delay adjustment

Circuitry for the delay adjustment of a clock signal

Offset cancellation in a multi-level signaling system

Chip-to-chip communication system using an ac-coupled bus and devices employed in same

Integrated circuit device having a capacitive coupling element

Chip-to-chip communication system using an ac-coupled bus and devices employed in same

Partial response receiver

Low latency multi-level communication interface

Margin test methods and circuits

Delay locked loop circuitry for clock delay adjustment

Expandable slave device system

Partial response receiver with clock data recovery

Receiver circuit architectures

Statistical margin test methods and circuits

Input/output cells with localized clock routing

Circuit calibration system and method

Multi-PAM output driver with distortion compensation

Memory controller that calibrates a transmit timing offset

Multiphase receiver with equalization

Delay locked loop circuitry for clock delay adjustment

Differential amplifiers and methods of using same

Margin test methods and circuits

Partial response receiver

Multiphase receiver with equalization circuitry

Partial response receiver

Flash memory controller with calibrated data communication

DFE margin test methods and circuits that decouple sample and feedback timing

INVENSENSE INC

Transmit beamforming of a two-dimensional array of ultrasonic transducers

Transmit operation of an ultrasonic sensor

Operation of an ultrasonic sensor

Operation of an ultrasonic sensor

Receive operation of an ultrasonic sensor

Image generation in an electronic device using ultrasonic transducers

SILICON LAB INC

Digital expander apparatus and method for generating multiple analog control signals particularly useful for controlling a sub-varactor array of a voltage controlled oscillator

Digital expander apparatus and method for generating multiple analog control signals particularly useful for controlling an oscillator

Method and apparatus for generating a clock signal in holdover mode

Digital expander for generating multiple analog control signals particularly useful for controlling an oscillator

ZERBE JARED L

Integrating receiver with precharge circuitry

Multiphase receiver with equalization circuitry

ZERBE JARED LEVAN

Memory system with calibrated data communication

Memory system with calibrated data communication

HUGHES AIRCRAFT CO

Variable gain amplifier circuit

STOJANOVIC VLADIMIR M

Partial response receiver