Inventor

KANG SANG-BEOM

KR67 patents

⚠️ This page may combine multiple inventors who share the name “KANG SANG-BEOM”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

KANG SANG-BEOM

SAMSUNG ELECTRONICS CO LTD

Layout structure in semiconductor memory device comprising global work lines, local work lines, global bit lines and local bit lines

Semiconductor memory device having a three-dimensional cell array structure

Semiconductor memory device and method for reducing cell activation during write operations

Non-volatile phase-change memory device and associated program-suspend-read operation

Phase-change memory element driver circuits using measurement to control current and methods of controlling drive current of phase-change memory elements using measurement

Semiconductor memory device having resistive memory cells and method of testing the same

Spin transfer torque magnetic random access memory for supporting operational modes with mode register

Circuits and methods for adaptive write bias driving of resistive non-volatile memory devices

Resistance random access memory having common source line

Nonvolatile memory devices that utilize read/write merge circuits

Method of programming a memory cell array using successive pulses of increased duration

Phase change random access memory (PRAM) device having variable drive voltages

Phase-change semiconductor memory device and method of programming the same

Semiconductor memory device

Phase change memory device and related programming method

Phase change memory devices employing cell diodes and methods of fabricating the same

Resistive memory device and method of controlling refresh operation of resistive memory device

Stacked memory device including a pre-decoder/pre-driver sandwiched between a plurality of inter-decoders/inter-drivers

Memory device, memory system having the same, and programming method of a memory cell

Nonvolatile memory device using resistance material

Bi-directional resistive random access memory capable of multi-decoding and method of writing data thereto

Nonvolatile memory device having memory and reference cells

Memory cell of a resistive semiconductor memory device, a resistive semiconductor memory device having a three-dimensional stack structure, and related methods

Nonvolatile memory devices having multi-filament variable resistivity memory cells therein

Phase change memory device and program method thereof

Spin transfer torque magnetic random access memory for supporting operational modes with mode register

Semiconductor devices and methods for changing operating characteristics and semiconductor systems including the same

Resistive memory devices having a stacked structure and methods of operation thereof

Magnetic packet memory storage devices, memory systems including such devices, and methods of controlling such devices

Phase change memory devices employing cell diodes and methods of fabricating the same

Layout structure in semiconductor memory device comprising global word lines, local word lines, global bit lines and local bit lines

Resistive memory device and method of writing data

Resistance semiconductor memory device having three-dimensional stack and word line decoding method thereof

Nonvolatile memory device having twin memory cells

Non-volatile memory including sub cell array and method of writing data thereto

Nonvolatile memory device and related method of operation

KIM HO-JUNG

Resistive memory devices, memory systems and methods of controlling input and output operations of the same

Identification of data positions in magnetic packet memory storage devices, memory systems including such devices, and methods of controlling such devices

Multi-level nonvolatile memory device with fast execution of program speed and programming method of the same

KANG SANG-BEOM

Semiconductor memory device and method of performing burn-in test on the same

Resistive memory devices and methods of controlling operations of the same

KIM CHAN-KYUNG

Nonvolatile memory device with a clamping voltage generation circuit for compensating the variations in memory cell parameters

Data read circuit, a non-volatile memory device having the same, and a method of reading data from the non-volatile memory device

PARK CHUL-WOO

Stacked semiconductor memory device and related error-correction method

Stacked memory device and method of repairing same

AHN SEUNG-EON

Stacked memory devices

SAMSUNG ELECTRONICS CO LLC

Phase change memory device for use in a burst read operation and a data reading method thereof

LEE YUN-SANG

Semiconductor memory devices for alternately selecting bit lines

OH HYUNG-ROK

Multi-layer semiconductor memory device comprising error checking and correction (ECC) engine and related ECC method

KIM HO JUNG

Semiconductor device, semiconductor system including the same, and voltage supply method of semiconductor device