Inventor
JEFFERSON DAVID
US37 patents
⚠️ This page may combine multiple inventors who share the name “JEFFERSON DAVID”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
ALTERA CORP
34 patentsUS7725738B1May 25, 2010
FPGA configuration bitstream protection using multiple keys
ALTERA CORP52 citations98
US7606362B1Oct 20, 2009
FPGA configuration bitstream encryption using modified key
ALTERA CORP40 citations96
US6417694B1Jul 9, 2002
Programmable logic device with hierarchical interconnection resources
ALTERA CORP40 citations96
US6326812B1Dec 4, 2001
Programmable logic device with logic signal delay compensated clock network
ALTERA CORP64 citations96
US6127865AOct 3, 2000
Programmable logic device with logic signal delay compensated clock network
ALTERA CORP57 citations96
US5977793ANov 2, 1999
Programmable logic device with hierarchical interconnection resources
ALTERA CORP87 citations96
US7818584B1Oct 19, 2010
One-time programmable memories for key storage
ALTERA CORP29 citations92
US7734043B1Jun 8, 2010
Encryption key obfuscation and storage
ALTERA CORP31 citations92
US6577160B2Jun 10, 2003
Programmable logic device with hierarchical interconnection resources
ALTERA CORP21 citations92
US6300794B1Oct 9, 2001
Programmable logic device with hierarchical interconnection resources
ALTERA CORP23 citations92
US6262933B1Jul 17, 2001
High speed programmable address decoder
ALTERA CORP16 citations92
US6163195ADec 19, 2000
Temperature compensated delay chain
ALTERA CORP38 citations92
US6965249B2Nov 15, 2005
Programmable logic device with redundant circuitry
ALTERA CORP39 citations91
US9208357B1Dec 8, 2015
FPGA configuration bitstream protection using multiple keys
ALTERA CORP6 citations84
US9054859B1Jun 9, 2015
FPGA configuration bitstream encryption using modified key
ALTERA CORP5 citations84
US8363833B1Jan 29, 2013
FPGA configuration bitstream encryption using modified key
ALTERA CORP8 citations84
US6826741B1Nov 30, 2004
Flexible I/O routing resources
ALTERA CORP18 citations84
US7228451B1Jun 5, 2007
Programmable clock network for distributing clock signals to and between first and second sections of an integrated circuit
ALTERA CORP12 citations83
US7051153B1May 23, 2006
Memory array operating as a shift register
ALTERA CORP16 citations83
US6996736B1Feb 7, 2006
Programmable clock network for distributing clock signals to and between first and second sections of an integrated circuit
ALTERA CORP12 citations83
US6600337B2Jul 29, 2003
Line segmentation in programmable logic devices having redundancy circuitry
ALTERA CORP16 citations82
US7984292B1Jul 19, 2011
FPGA configuration bitstream encryption using modified key
ALTERA CORP5 citations74
US6720796B1Apr 13, 2004
Multiple size memories in a programmable logic device
ALTERA CORP5 citations74
US6094064AJul 25, 2000
Programmable logic device incorporating and input/output overflow bus
ALTERA CORP9 citations74
US6798242B2Sep 28, 2004
Programmable logic device with hierarchical interconnection resources
ALTERA CORP6 citations73
US7343470B1Mar 11, 2008
Techniques for sequentially transferring data from a memory device through a parallel interface
ALTERA CORP8 citations72
US6759871B2Jul 6, 2004
Line segmentation in programmable logic devices having redundancy circuitry
ALTERA CORP10 citations72
US6121790ASep 19, 2000
Programmable logic device with enhanced multiplexing capabilities in interconnect resources
ALTERA CORP6 citations72
US8750503B1Jun 10, 2014
FPGA configuration bitstream encryption using modified key
ALTERA CORP1 citations63
US7463544B1Dec 9, 2008
Device programmable to operate as a multiplexer, demultiplexer, or memory device
ALTERA CORP3 citations63
US6459303B1Oct 1, 2002
High speed programmable address decoder
ALTERA CORP2 citations63
US7606081B1Oct 20, 2009
Device programmable to operate as a multiplexer, demultiplexer, or memory device
ALTERA CORP0 citations52
US7161381B1Jan 9, 2007
Multiple size memories in a programmable logic device
ALTERA CORP0 citations52
US6278288B1Aug 21, 2001
Programmable logic device with enhanced multiplexing capabilities in interconnect resources
ALTERA CORP1 citations50