Inventor
MAHAJANI MAITREYEE
US46 patents
⚠️ This page may combine multiple inventors who share the name “MAHAJANI MAITREYEE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
APPLIED MATERIALS INC
20 patentsUS7402534B2Jul 22, 2008
Pretreatment processes within a batch ALD reactor
APPLIED MATERIALS INC566 citations99
US7798096B2Sep 21, 2010
Plasma, UV and ion/neutral assisted ALD or CVD in a batch tool
APPLIED MATERIALS INC487 citations98
US7572052B2Aug 11, 2009
Method for monitoring and calibrating temperature in semiconductor processing chambers
APPLIED MATERIALS INC64 citations98
US6464795B1Oct 15, 2002
Substrate support member for a processing chamber
APPLIED MATERIALS INC98 citations97
US6328808B1Dec 11, 2001
Apparatus and method for aligning and controlling edge deposition on a substrate
APPLIED MATERIALS INC44 citations95
US7972978B2Jul 5, 2011
Pretreatment processes within a batch ALD reactor
APPLIED MATERIALS INC19 citations93
US7776395B2Aug 17, 2010
Method of depositing catalyst assisted silicates of high-k materials
APPLIED MATERIALS INC20 citations93
US8043907B2Oct 25, 2011
Atomic layer deposition processes for non-volatile memory devices
APPLIED MATERIALS INC42 citations92
US7749574B2Jul 6, 2010
Low temperature ALD SiO2
APPLIED MATERIALS INC33 citations92
US7659158B2Feb 9, 2010
Atomic layer deposition processes for non-volatile memory devices
APPLIED MATERIALS INC25 citations92
US6271129B1Aug 7, 2001
Method for forming a gap filling refractory metal layer having reduced stress
APPLIED MATERIALS INC21 citations92
US6186092B1Feb 13, 2001
Apparatus and method for aligning and controlling edge deposition on a substrate
APPLIED MATERIALS INC39 citations92
US9048183B2Jun 2, 2015
NMOS metal gate materials, manufacturing methods, and equipment using CVD and ALD processes with metal based precursors
APPLIED MATERIALS INC14 citations84
US8361910B2Jan 29, 2013
Pretreatment processes within a batch ALD reactor
APPLIED MATERIALS INC6 citations84
US7897208B2Mar 1, 2011
Low temperature ALD SiO2
APPLIED MATERIALS INC9 citations83
US6174373B1Jan 16, 2001
Non-plasma halogenated gas flow prevent metal residues
APPLIED MATERIALS INC7 citations74
US6070599AJun 6, 2000
Non-plasma halogenated gas flow to prevent metal residues
APPLIED MATERIALS INC10 citations74
US8987080B2Mar 24, 2015
Methods for manufacturing metal gates
APPLIED MATERIALS INC4 citations73
US5709772AJan 20, 1998
Non-plasma halogenated gas flow to prevent metal residues
APPLIED MATERIALS INC2 citations63
US7921803B2Apr 12, 2011
Chamber components with increased pyrometry visibility
APPLIED MATERIALS INC5 citations60
SANDISK 3D LLC
9 patentsUS7915164B2Mar 29, 2011
Method for forming doped polysilicon via connecting polysilicon layers
SANDISK 3D LLC251 citations99
US7566974B2Jul 28, 2009
Doped polysilicon via connecting polysilicon layers
SANDISK 3D LLC190 citations99
US7221588B2May 22, 2007
Memory array incorporating memory cells arranged in NAND strings
SANDISK 3D LLC259 citations99
US7557405B2Jul 7, 2009
High-density nonvolatile memory
SANDISK 3D LLC20 citations93
US7508714B2Mar 24, 2009
Memory array incorporating mirrored NAND strings and non-shared global bit lines within a block
SANDISK 3D LLC30 citations92
US7915163B2Mar 29, 2011
Method for forming doped polysilicon via connecting polysilicon layers
SANDISK 3D LLC4 citations74
US8951861B2Feb 10, 2015
Methods of making a high-density nonvolatile memory
SANDISK 3D LLC0 citations52
US8383478B2Feb 26, 2013
High-density nonvolatile memory and methods of making the same
SANDISK 3D LLC0 citations52
US8004033B2Aug 23, 2011
High-density nonvolatile memory
SANDISK 3D LLC0 citations52
MATRIX SEMICONDUCTOR INC
6 patentsUS6984561B2Jan 10, 2006
Method for making high density nonvolatile memory
MATRIX SEMICONDUCTOR INC131 citations99
US6952030B2Oct 4, 2005
High-density three-dimensional memory cell
MATRIX SEMICONDUCTOR INC472 citations99
US6858899B2Feb 22, 2005
Thin film transistor with metal oxide layer and method of making same
MATRIX SEMICONDUCTOR INC84 citations98
US7009275B2Mar 7, 2006
Method for making high density nonvolatile memory
MATRIX SEMICONDUCTOR INC37 citations96
US6995422B2Feb 7, 2006
High-density three-dimensional memory
MATRIX SEMICONDUCTOR INC52 citations96
US6960794B2Nov 1, 2005
Formation of thin channels for TFT devices to ensure low variability of threshold voltages
MATRIX SEMICONDUCTOR INC8 citations74
GANGULI SESHADRI
3 patentsUS8642468B2Feb 4, 2014
NMOS metal gate materials, manufacturing methods, and equipment using CVD and ALD processes with metal based precursors
GANGULI SESHADRI9 citations84
US9269584B2Feb 23, 2016
N-metal film deposition with initiation layer
GANGULI SESHADRI0 citations52
US8895443B2Nov 25, 2014
N-metal film deposition with initiation layer
GANGULI SESHADRI0 citations52
SATO TATSUYA E
3 patentsUS8778816B2Jul 15, 2014
In situ vapor phase surface activation of SiO2
SATO TATSUYA E9 citations82
US8633119B2Jan 21, 2014
Methods for manufacturing high dielectric constant films
SATO TATSUYA E3 citations60
US8633114B2Jan 21, 2014
Methods for manufacturing high dielectric constant films
SATO TATSUYA E0 citations49