Inventor

HO WAI-YAN

US5 patents

⚠️ This page may combine multiple inventors who share the name “HO WAI-YAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SYNOPSYS INC

3 patents

US6011911AJan 4, 2000

Layout overlap detection with selective flattening in computer implemented integrated circuit design

SYNOPSYS INC198 citations97

US6009251ADec 28, 1999

Method and system for layout verification of an integrated circuit design with reusable subdesigns

SYNOPSYS INC454 citations97

US6009250ADec 28, 1999

Selective flattening in layout areas in computer implemented integrated circuit design

SYNOPSYS INC124 citations96

SEIKO EPSON CORP

2 patents

US5581742ADec 3, 1996

Apparatus and method for emulating a microelectronic device by interconnecting and running test vectors on physically implemented functional modules

SEIKO EPSON CORP51 citations95

US5581562ADec 3, 1996

Integrated circuit device implemented using a plurality of partially defective integrated circuit chips

SEIKO EPSON CORP40 citations92