Inventor · disambiguated record
Jimshed Mirza
Also filed as: MIRZA JIMSHED · MIRZA JIMSHED B
23 granted patents·3 pending applications·69 citations·filing 2010–2024
92Inventor score
Top patents by PatentIndex Score
26 records- 0195US9239804B2Back-off mechanism for a peripheral page request logADVANCED MICRO DEVICES INC·Filed 2013·Granted Jan 19, 2016·44 cites·18 claims
- 0282US10241925B2Selecting a default page size in a variable page size TLBATI TECHNOLOGIES ULC·Filed 2017·Granted Mar 26, 2019·4 cites·20 claims
- 0381US10664403B1Per-group prefetch status to reduce duplicate prefetch requestsATI TECHNOLOGIES ULC·Filed 2018·Granted May 26, 2020·3 cites·20 claims
- 0481US10545887B2Multiple linked list data structureATI TECHNOLOGIES ULC·Filed 2017·Granted Jan 28, 2020·3 cites·20 claims
- 0576US10915359B2Variable latency request arbitrationATI TECHNOLOGIES ULC·Filed 2018·Granted Feb 9, 2021·2 cites·20 claims
- 0675US10540290B2Method and apparatus for translation lookaside buffer with multiple compressed encodingsATI TECHNOLOGIES ULC·Filed 2016·Granted Jan 21, 2020·2 cites·17 claims
- 0775US8495300B2Cache with reload capability after power restorationNG PHILIP·Filed 2010·Granted Jul 23, 2013·4 cites·20 claims
- 0874US10649810B2Data driven scheduler on multiple computing coresADVANCED MICRO DEVICES INC·Filed 2015·Granted May 12, 2020·2 cites·51 claims
- 0973US10535178B2Shader writes to compressed resourcesADVANCED MICRO DEVICES INC·Filed 2016·Granted Jan 14, 2020·2 cites·20 claims
- 1071US10223280B2Input/output memory map unit and northbridgeADVANCED MICRO DEVICES INC·Filed 2018·Granted Mar 5, 2019·1 cites·20 claims
- 1170US10956338B2Low latency dirty RAM for cache invalidation speed improvementATI TECHNOLOGIES ULC·Filed 2018·Granted Mar 23, 2021·1 cites·20 claims
- 1268US10606740B2Flexible shader export design in multiple computing coresADVANCED MICRO DEVICES INC·Filed 2017·Granted Mar 31, 2020·1 cites·20 claims
- 1361US12360909B2Last use cache policyATI TECHNOLOGIES ULC·Filed 2022·Granted Jul 15, 2025·0 cites·20 claims
- 1458US12236529B2Graphics discard engineADVANCED MICRO DEVICES INC·Filed 2021·Granted Feb 25, 2025·0 cites·20 claims
- 1558US12105634B2Translation lookaside buffer entry allocation system and methodATI TECHNOLOGIES ULC·Filed 2021·Granted Oct 1, 2024·0 cites·20 claims
- 1656US12169876B2Optimizing partial writes to compressed blocksADVANCED MICRO DEVICES INC·Filed 2021·Granted Dec 17, 2024·0 cites·20 claims
- 1755US12321273B2Cascading execution of atomic operationsADVANCED MICRO DEVICES INC·Filed 2021·Granted Jun 3, 2025·0 cites·20 claims
- 1854US11935153B2Data compression support for accelerated processorATI TECHNOLOGIES ULC·Filed 2020·Granted Mar 19, 2024·0 cites·20 claims
- 1954US10025721B2Input/output memory map unit and northbridgeADVANCED MICRO DEVICES INC·Filed 2014·Granted Jul 17, 2018·0 cites·20 claims
- 2053US2025307164A1Decoupled cache architectureADVANCED MICRO DEVICES INC·Filed 2024·Application pending·0 cites
- 2149US10353859B2Register allocation modes in a GPU based on total, maximum concurrent, and minimum number of registers needed by complex shadersADVANCED MICRO DEVICES INC·Filed 2017·Granted Jul 16, 2019·0 cites·16 claims
- 2248US10877926B2Method and system for partial wavefront mergerADVANCED MICRO DEVICES INC·Filed 2018·Granted Dec 29, 2020·0 cites·20 claims
- 2345US10540280B2High-speed selective cache invalidates and write-backs on GPUSADVANCED MICRO DEVICES INC·Filed 2016·Granted Jan 21, 2020·0 cites·20 claims
- 2443US2020167076A1Compressed memory access improvement through compression-aware partial writesATI TECHNOLOGIES ULC·Filed 2018·Application pending·0 cites
- 2541US2013138897A1Method and apparatus for dynamically controlling depth and power consumption of fifo memoryMIRZA JIMSHED B·Filed 2011·Application pending·0 cites
- 2635US10580110B2Hardware structure to track page reuseATI TECHNOLOGIES ULC·Filed 2017·Granted Mar 3, 2020·0 cites·17 claims
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