Inventor

LIU ZUOGUANG

US152 patents

⚠️ This page may combine multiple inventors who share the name “LIU ZUOGUANG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LIU ZUOGUANG

IBM

Recessed metal liner contact with copper fill

Fabrication of vertical transport fin field effect transistors with a self-aligned separator and an isolation region with an air gap

Forming wrap-around silicide contact on finFET

Shared contact trench comprising dual silicide layers and dual epitaxial layers for source/drain layers of NFET and PFET devices

Wrapped source/drain contacts with enhanced area

Embedded bottom metal contact formed by a self-aligned contact process for vertical transistors

Sacrificial cap for forming semiconductor contact

Low resistance dual liner contacts for Fin Field-Effect Transistors (FinFETs)

Forming wrap-around silicide contact on finFET

Split fin field effect transistor enabling back bias on fin type field effect transistors

Top contact resistance measurement in vertical FETs

Self-aligned spacer for cut-last transistor fabrication

Self aligned epitaxial based punch through control

Pure boron for silicide contact

Nanowire semiconductor device including lateral-etch barrier region

Independent gate vertical FinFET structure

Fabrication of vertical transport fin field effect transistors with a self-aligned separator and an isolation region with an air gap

Fin field effect transistor fabrication and devices having inverted T-shaped gate

Low resistance source/drain contacts for complementary metal oxide semiconductor (CMOS) devices

Low resistance source drain contact formation

Forming a contact for a semiconductor device

Fin field effect transistor fabrication and devices having inverted T-shaped gate

Fabrication of vertical doped fins for complementary metal oxide semiconductor field effect transistors

Forming CMOSFET structures with different contact liners

Dual silicide liner flow for enabling low contact resistance

Airgap spacers

Composite spacer enabling uniform doping in recessed fin devices

Recessed metal liner contact with copper fill

Punch through stopper in bulk finFET device

Forming CMOSFET structures with different contact liners

Forming CMOSFET structures with different contact liners

Nanowire semiconductor device including lateral-etch barrier region

Pure boron for silicide contact

FinFET having controlled dielectric region height

Symmetrical extension junction formation with low-K spacer and dual epitaxial process in FinFET device

Silicon nanowire formation in replacement metal gate process

Shallow trench isolation for end fin variation control

Independent gate vertical FinFET structure

Semiconductor device including merged-unmerged work function metal and variable fin pitch

Phase change memory cell resistive liner

Two-stage top source drain epitaxy formation for vertical field effect transistors enabling gate last formation

Vertical field effect transistor replacement metal gate fabrication

VFET device design for top contact resistance measurement

Fabrication of vertical transport fin field effect transistors with a self-aligned separator and an isolation region with an air gap

VFET device design for top contact resistance measurement

Fabrication of vertical transport fin field effect transistors with a self-aligned separator and an isolation region with an air gap

CMOS VFET contacts with trench solid and liquid phase epitaxy

GLOBALFOUNDRIES INC

Increased contact area for FinFETs

3D fin tunneling field effect transistor

TESSERA LLC

Punch through stopper in bulk finFET device