Inventor

YU HUNG-CHANG

TW61 patents

⚠️ This page may combine multiple inventors who share the name “YU HUNG-CHANG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

YU HUNG-CHANG

TAIWAN SEMICONDUCTOR MFG CO LTD

Method and apparatus for MRAM sense reference trimming

Method and apparatus for MRAM sense reference trimming

Memory device and method of operating same

MRAM smart bit write algorithm with error correction parity bits

Circuit and method to enhance efficiency of memory

Circuit and method to enhance efficiency of memory

Method for enhancing tunnel magnetoresistance in memory device

Method for enhancing tunnel magnetoresistance in memory device

Circuit and method to enhance efficiency of memory

Scrambling apparatus and method thereof

Adjustment circuit for partitioned memory block

Resistive memory array and fabricating method thereof

Memory device with recycling arrangement for gleaned charge

Memory device and method of operating same

Memory device and method of operating same

MRAM smart bit write algorithm with error correction parity bits

Enhancing tunnel magnetoresistance in memory device comprising a memory cell with a memory element coupled between a switch and a negative resistance device

Semiconductor arrangement and formation thereof

Resistive memory array and fabricating method thereof

Circuit and method to enhance efficiency of memory

Method and memory device with increased read and write margin

Method and memory device with increased read and write margin

Method and memory device with increased read and write margin

Adjustment circuit for partitioned memory block

Adjustment circuit for partitioned memory block

Memory device with charge-recycling arrangement

Resistive memory array and fabricating method thereof

Package with multiple plane I/O structure

Semiconductor arrangement and formation thereof

Sensing circuit with reduced bias clamp

Resistive memory array

TAIWAN SEMICONDUCTOR MFG

Low voltage supply bandgap reference circuit using PTAT and PTVBE current source

Accommodating balance of bit line and source line resistances in magnetoresistive random access memory

High speed current-mode sense-amplifier

Sensing circuit with reduced bias clamp

Memory word line boost using thin dielectric capacitor

Flash memory compiler with flexible configurations

Disabling flash memory to protect memory contents

Package with multiple plane I/O structure

YU HUNG-CHANG

MRAM with current-based self-referenced read operations

Charge pump control scheme using frequency modulation for memory word line

Fast bit-line pre-charge scheme

Charge pump control scheme for memory word line

Fast-switching word line driver

CHIH YUE-DER

Reference cell configuration for sensing resistance states of MRAM bit cells

Adjusting reference resistances in determining MRAM resistance states

LIN KAI-CHUN

Differential MRAM structure with relatively reversed magnetic tunnel junction elements enabling writing using same polarity current

Read architecture for MRAM

CHARTERED SEMICONDUCTOR MFG

Reliable level shifter of ultra-high voltage device used in low power application

CHIANG TIEN-WEI

Magnetoresistive random access memory