Inventor

SHIFREN LUCIAN

US116 patents

⚠️ This page may combine multiple inventors who share the name “SHIFREN LUCIAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SHIFREN LUCIAN

ADVANCED RISC MACH LTD

Access devices to correlated electron switch

Method, system and device for complementary non-volatile memory device operation

Method, system and device for non-volatile memory device operation

Fabrication of correlated electron material devices

One-time and multi-time programming using a correlated electron switch

Fabrication of correlated electron material films with varying atomic or molecular concentrations of dopant species

Method, system and device for non-volatile memory device operation

Method, system and device for non-volatile memory device operation

Device and method for generating random numbers

Correlated electron switch

Barrier layer for correlated electron material

Correlated electron switch structures and applications

Asymmetric correlated electron switch operation

Methods and processes for forming devices from correlated electron material (CEM)

Power clamp with correlated electron material device

Access devices to correlated electron switch

CEM switching device

Fabrication of correlated electron material devices with reduced interfacial layer impedance

Fabrication of correlated electron material films with varying atomic or molecular concentrations of dopant species

Fabrication of correlated electron material film via exposure to ultraviolet energy

Access devices to correlated electron switch

Method, system and device for complementary non-volatile memory device operation

Fabrication of correlated electron material devices

Barrier layer for correlated electron material

Selective writes in a storage element

Electrical component with random electrical characteristic

MIE FUJITSU SEMICONDUCTOR LTD

High uniformity screen and epitaxial layers for CMOS devices

Semiconductor structure with improved channel stack and method for fabrication thereof

Transistor with threshold voltage set notch and method of fabrication thereof

Semiconductor structure with multiple transistors having various threshold voltages

Low power semiconductor transistor structure and method of fabrication thereof

Low power semiconductor transistor structure and method of fabrication thereof

Dynamic random access memory (DRAM) with low variation transistor peripheral circuits

SHIFREN LUCIAN

Process for manufacturing an improved analog transistor

Electronic device with controlled threshold voltage

Advanced transistors with punch through suppression

Low power semiconductor transistor structure and method of fabrication thereof

Semiconductor structure and method of fabrication thereof with mixed metal types

Method for fabricating multiple transistor devices on a substrate with varying threshold voltages

INTEL CORP

Replacement spacers for MOSFET fringe capacitance reduction and processes of making same

Epitaxial silicon germanium for reduced contact resistance in field-effect transistors

Epitaxial silicon germanium for reduced contact resistance in field-effect transistors

Complementary metal oxide semiconductor integrated circuit using uniaxial compressive stress and biaxial compressive stress

SUVOLTA INC

Method for reducing punch-through in a transistor device

Process for manufacture of integrated circuits with different channel doping transistor architectures and devices therefrom

RANADE PUSHKAR

Source/drain extension control for advanced transistors

Source/drain extension control for advanced transistors

THOMPSON SCOTT E

Transistor having reduced junction leakage and methods of forming thereof

HOFFMANN THOMAS

Multiple transistor types formed in a common epitaxial layer by differential out-diffusion from a doped underlayer

ARGHAVANI REZA

Transistor with threshold voltage set notch and method of fabrication thereof