Inventor
JEN MICHELLE C
US20 patents
Patents
20 patentsUS7228362B2Jun 5, 2007
Out-of-order servicing of read requests with minimal additional storage
INTEL CORP29 citations92
US9720838B2Aug 1, 2017
Shared buffered memory routing
INTEL CORP5 citations84
US10713209B2Jul 14, 2020
Recalibration of PHY circuitry for the PCI Express (PIPE) interface based on using a message bus interface
INTEL CORP11 citations83
US10606785B2Mar 31, 2020
Flex bus protocol negotiation and enabling sequence
INTEL CORP10 citations82
US9921768B2Mar 20, 2018
Low power entry in a shared memory link
INTEL CORP4 citations73
US11095556B2Aug 17, 2021
Techniques to support multiple protocols between computer system interconnects
INTEL CORP5 citations72
US10915468B2Feb 9, 2021
Sharing memory and I/O services between nodes
INTEL CORP4 citations72
US11144492B2Oct 12, 2021
Flex bus protocol negotiation and enabling sequence
INTEL CORP3 citations71
US12517846B2Jan 6, 2026
Sharing memory and I/O services between nodes
INTEL CORP0 citations62
US12405904B2Sep 2, 2025
Sharing memory and I/O services between nodes
INTEL CORP0 citations62
US12399832B2Aug 26, 2025
Shared buffered memory routing
INTEL CORP0 citations62
US11755486B2Sep 12, 2023
Shared buffered memory routing
INTEL CORP0 citations62
US11729096B2Aug 15, 2023
Techniques to support multiple protocols between computer system interconnects
INTEL CORP0 citations62
US11113196B2Sep 7, 2021
Shared buffered memory routing
INTEL CORP0 citations62
US11789892B2Oct 17, 2023
Recalibration of PHY circuitry for the PCI express (PIPE) interface based on using a message bus interface
INTEL CORP0 citations60
US11726939B2Aug 15, 2023
Flex bus protocol negotiation and enabling sequence
INTEL CORP0 citations60
US11327920B2May 10, 2022
Recalibration of PHY circuitry for the PCI express (pipe) interface based on using a message bus interface
INTEL CORP0 citations60
US12332752B2Jun 17, 2025
Hardware logging for lane margining and characterization
INTEL CORP0 citations58
US9779053B2Oct 3, 2017
Physical interface for a serial interconnect
INTEL CORP0 citations52
US9665415B2May 30, 2017
Low-latency internode communication
INTEL CORP0 citations52