Inventor
CHUANG CHIAO-MEI
US10 patents
⚠️ This page may combine multiple inventors who share the name “CHUANG CHIAO-MEI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
8 patentsUS4766566AAug 23, 1988
Performance enhancement scheme for a RISC type VLSI processor using dual execution units for parallel instruction processing
IBM158 citations98
US6356918B1Mar 12, 2002
Method and system for managing registers in a data processing system supports out-of-order and speculative instruction execution
IBM97 citations97
US5812811ASep 22, 1998
Executing speculative parallel instructions threads with forking and inter-thread communication
IBM260 citations96
US5371864ADec 6, 1994
Apparatus for concurrent multiple instruction decode in variable length instruction set computer
IBM70 citations95
US4905188AFeb 27, 1990
Functional cache memory chip architecture for improved cache access
IBM85 citations93
US5367648ANov 22, 1994
General purpose memory access scheme using register-indirect mode
IBM8 citations73
US5777918AJul 7, 1998
Fast multiple operands adder/subtracter based on shifting
IBM9 citations72
US6185674B1Feb 6, 2001
Method and apparatus for reconstructing the address of the next instruction to be completed in a pipelined processor
IBM6 citations60