Inventor
WAYNE TODD
US7 patents
Patents
7 patentsUS7225416B1May 29, 2007
Methods and apparatus for automatic test component generation and inclusion into simulation testbench
ALTERA CORP18 citations91
US7409670B1Aug 5, 2008
Scheduling logic on a programmable device implemented using a high-level language
ALTERA CORP29 citations90
US7370311B1May 6, 2008
Generating components on a programmable device using a high-level language
ALTERA CORP16 citations83
US7730435B2Jun 1, 2010
Automatic test component generation and inclusion into simulation testbench
ALTERA CORP7 citations72
US7353484B1Apr 1, 2008
Methods and apparatus for variable latency support
ALTERA CORP7 citations71
US7409608B1Aug 5, 2008
Pseudo-random wait-state and pseudo-random latency components
ALTERA CORP6 citations61
US7149827B1Dec 12, 2006
Methods and apparatus for tristate line sharing
ALTERA CORP1 citations50