Inventor
CHADWICK NATHANIEL R
US12 patents
⚠️ This page may combine multiple inventors who share the name “CHADWICK NATHANIEL R”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
11 patentsUS7877222B2Jan 25, 2011
Structure for a phase locked loop with adjustable voltage based on temperature
IBM7 citations84
US7493229B2Feb 17, 2009
Adjusting voltage for a phase locked loop based on temperature
IBM8 citations84
US9520876B1Dec 13, 2016
Power gating and clock gating in wiring levels
IBM14 citations79
US9250645B2Feb 2, 2016
Circuit design for balanced logic stress
IBM3 citations71
US9472269B2Oct 18, 2016
Stress balancing of circuits
IBM2 citations62
US11422611B2Aug 23, 2022
Adaptive frequency optimization in processors
IBM0 citations57
US9099427B2Aug 4, 2015
Thermal energy dissipation using backside thermoelectric devices
IBM0 citations51
US9383767B2Jul 5, 2016
Circuit design for balanced logic stress
IBM0 citations50
US8943458B1Jan 27, 2015
Determining chip burn-in workload using emulated application condition
IBM0 citations50
US9437670B2Sep 6, 2016
Light activated test connections
IBM0 citations49
US10509457B2Dec 17, 2019
Adaptive frequency optimization in processors
IBM0 citations47