Inventor

LEE CHIEN-HSUN

TW146 patents

⚠️ This page may combine multiple inventors who share the name “LEE CHIEN-HSUN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LEE CHIEN-HSUN

TAIWAN SEMICONDUCTOR MFG CO LTD

Stacked semiconductor devices and methods of forming same

Methods of forming multi-die package structures including redistribution layers

Integrated circuit package and methods of forming same

Redistribution structures in semiconductor packages and methods of forming same

Substrate design for semiconductor packages and method of forming same

Semiconductor package

Package-on-package structure with organic interposer

Substrate design for semiconductor packages and method of forming same

Wafer level package structure and method of forming same

Semiconductor device and method of manufacture

Methods of forming multi-die package structures including redistribution layers

Integrated circuit package and method

Circuit board, semiconductor device including the same, and manufacturing method thereof

Semiconductor package structure and manufacturing method thereof

Substrate design for semiconductor packages and method of forming same

Packages with stacked dies and methods of forming the same

Wafer level package structure and method of forming same

Semiconductor structure and method of fabricating the same

Transmission line design and method, where high-k dielectric surrounds the transmission line for increased isolation

Thermal performance structure for semiconductor packages and method of forming same

Concentric bump design for the alignment in die stacking

Electronics card including multi-chip module

Semiconductor package including dies having high-modulus dielectric layer and manufacturing method thereof

Package structure comprising buffer layer for reducing thermal stress and method of forming the same

Package structure and method of forming the same

Wafer level package structure and method of forming same

Semiconductor device and method, where a dielectric material directly contacts a high-k dielectric material and first and second transmission lines

Electronics card including multi-chip module

Package structure comprising buffer layer for reducing thermal stress and method of forming the same

Semiconductor device having a high-k dielectric material disposed beyween first and second transmission lines and a dielectric directly contacting the high-k dielectric material

Integrated circuit package and method

Thermal performance structure for semiconductor packages and method of forming same

Semiconductor package and manufacturing method thereof

Planarization of semiconductor packages and structures resulting therefrom

Semiconductor package and semiconductor device

Package structure and method of manufacturing the same

Substrate design for semiconductor packages and method of forming same

TAIWAN SEMICONDUCTOR MFG

Packages with stacked dies and methods of forming the same

Pop joint through interposer

Package on package structures and methods for forming the same

YU CHEN-HUA

Package on package devices and methods of packaging semiconductor dies

Package on package devices and methods of forming same

Multiple die packaging interposer structure and method

AT & T BELL LAB

Debondable metallic bonding method

Permanent metallic bonding method

HOLTEK SEMICONDUCTOR INC

Delay lock loop and phase angle generator

Adjusting frequency device of built-in oscillator for USB interface and method thereof

KATZ AVISHAY

Bonding method using solder composed of multiple alternating gold and tin layers

CHENG JUNG WEI

Package on package structures and methods for forming the same

PARABELLUM STRATEGIC OPPORTUNITIES FUND LLC

Multi-die package structures including redistribution layers