Inventor

PENG YUAN-CHING

TW59 patents

⚠️ This page may combine multiple inventors who share the name “PENG YUAN-CHING”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

PENG YUAN-CHING

TAIWAN SEMICONDUCTOR MFG CO LTD

Integrated circuit structure with backside dielectric layer having air gap

Semiconductor substructure having elevated strain material-sidewall interface and method of making the same

Germanium hump reduction

Integrated circuit structure with backside dielectric layer having air gap

Semiconductor devices including backside vias and methods of forming the same

Method and structure for air gap inner spacer in gate-all-around devices

Semiconductor device with a core-shell feature and method for forming the same

Dielectric isolation structure for multi-gate transistors

Method and structure for air gap inner spacer in gate-all-around devices

Dual epitaxial process for a finFET device

Method of manufacturing a semiconductor device and a semiconductor device

Semiconductor devices including backside vias and methods of forming the same

Integrated circuit structure with backside dielectric layer having air gap

Devices with improved operational current and reduced leakage current

Methods of forming of inner spacer structure using semiconductor material with variable germanium concentration

Methods for forming source/drain features

Semiconductor device with tunable channel layer usage and methods of fabrication thereof

Tapered dielectric layer for preventing electrical shorting between gate and back side via

Semiconductor devices including backside vias and methods of forming the same

Method of manufacturing a semiconductor device and a semiconductor device

Inner spacer structure and methods of forming such

Method and structure for air gap inner spacer in gate-all-around devices

Dielectric isolation structure for multi-gate transistors

Dielectric fin structure

Seal ring structures

Semiconductor device and methods of forming the same

Dielectric fin structure

Dielectric isolation structure for multi-gate transistors

Dielectric fin structure

Semiconductor device structure with uneven gate profile

Semiconductor device structure with uneven gate profile

Germanium hump reduction

Semiconductor structure and method for manufacturing the same

Semiconductor structure and related methods

Semiconductor structure and related methods

Multigate device structure with engineered cladding and method making the same

Semiconductor devices and methods of forming the same

Semiconductor substructure having elevated strain material-sidewall interface and method of making the same

Memory structure and method for manufacturing the same

Multi-gate transistor channel height adjustment

TAIWAN SEMICONDUCTOR MFG

Butted contact structure

Magnetic memory array

Magnetic memory array

Hard mask removal for semiconductor devices

UNITED MICROELECTRONICS CORP

Method of fabricating contact plug

Method of manufacturing semiconductor components having a titanium nitride layer

Method of manufacturing cobalt silicide layer

CHEN HUNG-KAI

Dual epitaxial process for a finFET device

LAI KAO-TING

Device with self aligned stressor and method of making same

IND TECH RES INST

High resolution and brightness full-color LED display manufactured using CMP technique