Inventor
Liu pei-yi
TW29 patents
⚠️ This page may combine multiple inventors who share the name “Liu pei-yi”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
TAIWAN SEMICONDUCTOR MFG CO LTD
14 patentsUS9594862B2Mar 14, 2017
Method of fabricating an integrated circuit with non-printable dummy features
TAIWAN SEMICONDUCTOR MFG CO LTD19 citations92
US9436788B2Sep 6, 2016
Method of fabricating an integrated circuit with block dummy for optimized pattern density uniformity
TAIWAN SEMICONDUCTOR MFG CO LTD11 citations84
US9436787B2Sep 6, 2016
Method of fabricating an integrated circuit with optimized pattern density uniformity
TAIWAN SEMICONDUCTOR MFG CO LTD11 citations84
US11061317B2Jul 13, 2021
Method of fabricating an integrated circuit with non-printable dummy features
TAIWAN SEMICONDUCTOR MFG CO LTD4 citations73
US10811225B2Oct 20, 2020
Method of fabricating an integrated circuit with a pattern density-outlier-treatment for optimized pattern density uniformity
TAIWAN SEMICONDUCTOR MFG CO LTD1 citations73
US10431423B2Oct 1, 2019
Method of fabricating an integrated circuit with a pattern density-outlier-treatment for optimized pattern density uniformity
TAIWAN SEMICONDUCTOR MFG CO LTD1 citations73
US10359695B2Jul 23, 2019
Method of fabricating an integrated circuit with non-printable dummy features
TAIWAN SEMICONDUCTOR MFG CO LTD1 citations73
US10170276B2Jan 1, 2019
Method of fabricating an integrated circuit with a pattern density-outlier-treatment for optimized pattern density uniformity
TAIWAN SEMICONDUCTOR MFG CO LTD3 citations73
US12166096B2Dec 10, 2024
Semiconductor device structure with uneven gate profile
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations60
US11631745B2Apr 18, 2023
Semiconductor device structure with uneven gate profile
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations60
US9678434B2Jun 13, 2017
Grid refinement method
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations52
US9552964B2Jan 24, 2017
Method of fabricating an integrated circuit with a pattern density-outlier-treatment for optimized pattern density uniformity
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations52
US9529271B2Dec 27, 2016
Grid refinement method
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations52
US9658538B2May 23, 2017
System and technique for rasterizing circuit layout data
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations51
TAIWAN SEMICONDUCTOR MFG
7 patentsUS8822106B2Sep 2, 2014
Grid refinement method
TAIWAN SEMICONDUCTOR MFG31 citations96
US8828632B2Sep 9, 2014
Multiple-grid exposure method
TAIWAN SEMICONDUCTOR MFG26 citations93
US8972908B2Mar 3, 2015
Method for electron beam proximity correction with improved critical dimension accuracy
TAIWAN SEMICONDUCTOR MFG10 citations84
US8822107B2Sep 2, 2014
Grid refinement method
TAIWAN SEMICONDUCTOR MFG5 citations84
US9329488B2May 3, 2016
Grid refinement method
TAIWAN SEMICONDUCTOR MFG2 citations63
US9176389B2Nov 3, 2015
Grid refinement method
TAIWAN SEMICONDUCTOR MFG2 citations63
US8984452B2Mar 17, 2015
Long-range lithographic dose correction
TAIWAN SEMICONDUCTOR MFG0 citations42