Inventor

KULKARNI DEEPAK V

US5 patents

⚠️ This page may combine multiple inventors who share the name “KULKARNI DEEPAK V”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

INTEL CORP

3 patents

US10453799B2Oct 22, 2019

Logic die and other components embedded in build-up layers

INTEL CORP2 citations70

US9496211B2Nov 15, 2016

Logic die and other components embedded in build-up layers

INTEL CORP5 citations70

US9808875B2Nov 7, 2017

Methods of fabricating low melting point solder reinforced sealant and structures formed thereby

INTEL CORP0 citations50

TEH WENG HONG

1 patent

US9601421B2Mar 21, 2017

BBUL material integration in-plane with embedded die for warpage control

TEH WENG HONG3 citations70

KULKARNI DEEPAK V

1 patent

US9254532B2Feb 9, 2016

Methods of fabricating low melting point solder reinforced sealant and structures formed thereby

KULKARNI DEEPAK V0 citations43