Inventor
GLAISE RENE
FR36 patents
⚠️ This page may combine multiple inventors who share the name “GLAISE RENE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
32 patentsUS7284184B2Oct 16, 2007
Forward error correction scheme compatible with the bit error spreading of a scrambler
IBM34 citations92
US6932617B2Aug 23, 2005
Fragmented backplane system for I/O applications
IBM27 citations92
US6424632B1Jul 23, 2002
Method and apparatus for testing packet data integrity using data check field
IBM40 citations92
US6421660B1Jul 16, 2002
Enhanced searching method and apparatus for variable bit chains
IBM25 citations92
US6189124B1Feb 13, 2001
Method and apparatus for a two-step calculation of CRC-32
IBM34 citations92
US6097725AAug 1, 2000
Low cost searching method and apparatus for asynchronous transfer mode systems
IBM33 citations92
US6014767AJan 11, 2000
Method and apparatus for a simple calculation of CRC-10
IBM38 citations92
US5694407ADec 2, 1997
Method and an apparatus for modifying a FCS
IBM26 citations92
US4961193AOct 2, 1990
Extended errors correcting device having single package error correcting and double package error detecting codes
IBM27 citations92
US5761735AJun 2, 1998
Circuit for synchronizing data transfers between two devices operating at different speeds
IBM33 citations91
US5539756AJul 23, 1996
Method to ensure data integrity in a telecommunications network
IBM23 citations91
US5818815AOct 6, 1998
Method and an apparatus for shaping the output traffic in a fixed length cell switching network node
IBM43 citations89
US7996747B2Aug 9, 2011
Forward error correction encoding for multiple link transmission compatible with 64B/66B scrambling
IBM32 citations88
US7249309B2Jul 24, 2007
Single-burst-correction / double-burst-detection error code
IBM31 citations86
US7400629B2Jul 15, 2008
CAM based system and method for re-sequencing data packets
IBM12 citations84
US7103822B2Sep 5, 2006
Method and apparatus for computing ‘N-bit at a time’ CRC's of data frames of lengths not multiple of N
IBM12 citations84
US7391766B2Jun 24, 2008
Packet unstopper system for a parallel packet switch
IBM10 citations83
US6824393B2Nov 30, 2004
Fragmented backplane system for I/O applications
IBM15 citations83
US7773602B2Aug 10, 2010
CAM based system and method for re-sequencing data packets
IBM6 citations74
US7430167B2Sep 30, 2008
Method and system to enable an adaptive load balancing in a parallel packet switch
IBM8 citations73
US7289523B2Oct 30, 2007
Data packet switch and method of operating same
IBM6 citations73
US5043937AAug 27, 1991
Efficient interface for the main store of a data processing system
IBM19 citations71
US7403536B2Jul 22, 2008
Method and system for resequencing data packets switched through a parallel packet switch
IBM2 citations63
US8055984B2Nov 8, 2011
Forward error correction scheme compatible with the bit error spreading of a scrambler
IBM2 citations62
US7787446B2Aug 31, 2010
Packet unstopper system for a parallel packet switch
IBM4 citations62
US7769003B2Aug 3, 2010
Data packet switch and method of operating same
IBM3 citations62
US7706394B2Apr 27, 2010
System and method for collapsing VOQ's of a packet switch fabric
IBM4 citations62
US7486683B2Feb 3, 2009
Algorithm and system for selecting acknowledgments from an array of collapsed VOQ's
IBM2 citations62
US7134067B2Nov 7, 2006
Apparatus and method for allowing a direct decode of fire and similar codes
IBM2 citations62
US4076986AFeb 28, 1978
Device for reproducing the charge stored in an input capacitor in a plurality of output capacitors
IBM5 citations62
US7839797B2Nov 23, 2010
Event-driven flow control for a very high-speed switching node
IBM0 citations51
US7324460B2Jan 29, 2008
Event-driven flow control for a very high-speed switching node
IBM1 citations51