Inventor

LIN DA-WEN

TW64 patents

⚠️ This page may combine multiple inventors who share the name “LIN DA-WEN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LIN DA-WEN

TAIWAN SEMICONDUCTOR MFG CO LTD

FinFET fabrication methods

Formation of dislocations in source and drain regions of FinFET devices

Formation of dislocations in source and drain regions of FinFET devices

Method and apparatus of forming an integrated circuit with a strained channel region

Two-transistor bandgap reference circuit and FinFET device suited for same

FinFET fabrication methods

FinFET device with different liners for PFET and NFET and method of fabricating thereof

Methods of annealing after deposition of gate layers

Semiconductor device structure and method for forming the same

Multi-gate device and related methods

Semiconductor structure and method for forming the same

Semiconductor device and manufacturing method thereof

Multi-gate device and related methods

Formation of dislocations in source and drain regions of FinFET devices

Manufacturing method for semiconductor structure having a plurality of fins

Source/drain contact with low-k contact etch stop layer and method of fabricating thereof

FinFET fabrication methods

Semiconductor structure having fin with all around gate

FinFET device with different liners for PFET and NFET and method of fabricating thereof

FinFET device with different liners for PFET and NFET and method of fabricating thereof

Device with engineered epitaxial region and methods of making same

Two-transistor bandgap reference circuit and FinFET device suited for same

TAIWAN SEMICONDUCTOR MFG

Formation of dislocations in source and drain regions of FinFET devices

Damascene gate electrode method for fabricating field effect transistor (FET) device with ion implanted lightly doped extension regions

Planarizing method for fabricating gate electrodes

Narrow width effect improvement with photoresist plug process and STI corner ion implantation

Multiple-gate semiconductor device and method

FinFET with multiple dislocation planes and method for forming the same

Method for enhancing channel strain

Multiple-gate semiconductor device and method

Asymmetric rapid thermal annealing to reduce pattern effect

Methods of forming integrated circuits

Recessed gate structure with reduced current leakage and overlap capacitance

Techniques for FinFET doping

Narrow width effect improvement with photoresist plug process and STI corner ion implantation

Flash anneal for a PAI, NiSi process

TSAI CHUN HSIUNG

Methods of anneal after deposition of gate layers

Techniques for FinFET doping

FinFET LDD and source drain implant technique

LIN DA-WEN

LDD epitaxy for FinFETs

Gated diode with non-planar source region

CHENG MING-LUNG

Strained channel integrated circuit devices

TSENG CHIH-HUNG

Transistor having notched fin structure and method of making the same

LEE TUNG YING

Multiple-gate semiconductor device and method

HUANG YU-LIEN

High surface dopant concentration semiconductor device and method of fabricating

TAIWAN SEMICONDUCTOR MANFACTUR

Silicon oxycarbide and silicon carbonitride based materials for MOS devices

LAI KAO-TING

Device with self aligned stressor and method of making same

CHIANG CHUNG-YU

Multi-threshold voltage device and method of making same

TAIWAN SEMICONDUCTOR MFG COMPANY LTD

Methods of manufacturing a semiconductor device with local isolation and a semiconductor device with local isolation

WONG KING-YUEN

Device with engineered epitaxial region and methods of making same