Inventor
KAILAS KRISHNAN K
US16 patents
⚠️ This page may combine multiple inventors who share the name “KAILAS KRISHNAN K”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
12 patentsUS7506139B2Mar 17, 2009
Method and apparatus for register renaming using multiple physical register files and avoiding associative search
IBM17 citations83
US8978001B1Mar 10, 2015
Enhanced case-splitting based property checking
IBM4 citations72
US10331829B2Jun 25, 2019
System design using accurate performance models
IBM4 citations71
US9389876B2Jul 12, 2016
Three-dimensional processing system having independent calibration and statistical collection layer
IBM2 citations62
US9383411B2Jul 5, 2016
Three-dimensional processing system having at least one layer with circuitry dedicated to scan testing and system state checkpointing of other system layers
IBM2 citations62
US7454597B2Nov 18, 2008
Computer processing system employing an instruction schedule cache
IBM2 citations62
US7484075B2Jan 27, 2009
Method and apparatus for providing fast remote register access in a clustered VLIW processor using partitioned register files
IBM2 citations61
US9696379B2Jul 4, 2017
Three-dimensional processing system having at least one layer with circuitry dedicated to scan testing and system state checkpointing of other system layers
IBM0 citations52
US9195630B2Nov 24, 2015
Three-dimensional computer processor systems having multiple local power and cooling layers and a global interconnection structure
IBM0 citations52
US9190118B2Nov 17, 2015
Memory architectures having wiring structures that enable different access patterns in multiple dimensions
IBM0 citations52
US10699049B2Jun 30, 2020
System design using accurate performance models
IBM0 citations51
US8997030B1Mar 31, 2015
Enhanced case-splitting based property checking
IBM1 citations51
BUYUKTOSUNOGLU ALPER
2 patentsUS8799710B2Aug 5, 2014
3-D stacked multiprocessor structures and methods to enable reliable operation of processors at speeds above specified limits
BUYUKTOSUNOGLU ALPER2 citations61
US8826073B2Sep 2, 2014
3-D stacked multiprocessor structures and methods to enable reliable operation of processors at speeds above specified limits
BUYUKTOSUNOGLU ALPER0 citations51
GLOBALFOUNDRIES INC
2 patentsUS9336144B2May 10, 2016
Three-dimensional processing system having multiple caches that can be partitioned, conjoined, and managed according to more than one set of rules and/or configurations
GLOBALFOUNDRIES INC0 citations52
US9257152B2Feb 9, 2016
Memory architectures having wiring structures that enable different access patterns in multiple dimensions
GLOBALFOUNDRIES INC0 citations52