P

Inventor

SAMPLE STEPHEN P

US38 patents
⚠️ This page may combine multiple inventors who share the name “SAMPLE STEPHEN P”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

QUICKTURN DESIGN SYSTEMS INC

19 patents
US5841967ANov 24, 1998

Method and apparatus for design verification using emulation and simulation

QUICKTURN DESIGN SYSTEMS INC134 citations99
US6732068B2May 4, 2004

Memory circuit for use in hardware emulation system

QUICKTURN DESIGN SYSTEMS INC273 citations98
US6377912B1Apr 23, 2002

Emulation system with time-multiplexed interconnect

QUICKTURN DESIGN SYSTEMS INC153 citations98
US6058492AMay 2, 2000

Method and apparatus for design verification using emulation and simulation

QUICKTURN DESIGN SYSTEMS INC102 citations98
US5960191ASep 28, 1999

Emulation system with time-multiplexed interconnect

QUICKTURN DESIGN SYSTEMS INC169 citations98
US5943490AAug 24, 1999

Distributed logic analyzer for use in a hardware logic emulation system

QUICKTURN DESIGN SYSTEMS INC136 citations98
US6694464B1Feb 17, 2004

Method and apparatus for dynamically testing electrical interconnect

QUICKTURN DESIGN SYSTEMS INC171 citations97
US6289494B1Sep 11, 2001

Optimized emulation and prototyping architecture

QUICKTURN DESIGN SYSTEMS INC78 citations96
US5887158AMar 23, 1999

Switching midplane and interconnecting system for interconnecting large numbers of signals

QUICKTURN DESIGN SYSTEMS INC169 citations96
US6377911B1Apr 23, 2002

Apparatus for emulation of electronic hardware system

QUICKTURN DESIGN SYSTEMS INC44 citations95
US5963735AOct 5, 1999

Hardware logic emulation system

QUICKTURN DESIGN SYSTEMS INC59 citations95
US5644515AJul 1, 1997

Hardware logic emulation system capable of probing internal nodes in a circuit design undergoing emulation

QUICKTURN DESIGN SYSTEMS INC59 citations95
US5477475ADec 19, 1995

Method for emulating a circuit design using an electrically reconfigurable hardware emulation apparatus

QUICKTURN DESIGN SYSTEMS INC81 citations95
US5452239ASep 19, 1995

Method of removing gated clocks from the clock nets of a netlist for timing sensitive implementation of the netlist in a hardware emulation system

QUICKTURN DESIGN SYSTEMS INC436 citations94
US6625793B2Sep 23, 2003

Optimized emulation and prototyping architecture

QUICKTURN DESIGN SYSTEMS INC23 citations93
US7739097B2Jun 15, 2010

Emulation system with time-multiplexed interconnect

QUICKTURN DESIGN SYSTEMS INC26 citations92
US6842729B2Jan 11, 2005

Apparatus for emulation of electronic systems

QUICKTURN DESIGN SYSTEMS INC26 citations92
US6882176B1Apr 19, 2005

High-performance programmable logic architecture

QUICKTURN DESIGN SYSTEMS INC14 citations84
US6151258ANov 21, 2000

Programmable logic device with multi-port memory

QUICKTURN DESIGN SYSTEMS INC13 citations82

ALTERA CORP

13 patents

QUICKTURN SYSTEMS INC

4 patents

INTEL CORP

1 patent

MONTEREY DESIGN SYSTEMS INC

1 patent