Inventor
BERSHTEYN MIKHAIL
US19 patents
⚠️ This page may combine multiple inventors who share the name “BERSHTEYN MIKHAIL”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
QUICKTURN DESIGN SYSTEMS INC
6 patentsUS5841967ANov 24, 1998
Method and apparatus for design verification using emulation and simulation
QUICKTURN DESIGN SYSTEMS INC134 citations99
US6732068B2May 4, 2004
Memory circuit for use in hardware emulation system
QUICKTURN DESIGN SYSTEMS INC273 citations98
US6377912B1Apr 23, 2002
Emulation system with time-multiplexed interconnect
QUICKTURN DESIGN SYSTEMS INC153 citations98
US6058492AMay 2, 2000
Method and apparatus for design verification using emulation and simulation
QUICKTURN DESIGN SYSTEMS INC102 citations98
US5960191ASep 28, 1999
Emulation system with time-multiplexed interconnect
QUICKTURN DESIGN SYSTEMS INC169 citations98
US7739097B2Jun 15, 2010
Emulation system with time-multiplexed interconnect
QUICKTURN DESIGN SYSTEMS INC26 citations92
BERSHTEYN MIKHAIL
4 patentsUS8743735B1Jun 3, 2014
Emulation system for verifying a network device
BERSHTEYN MIKHAIL17 citations76
US8959010B1Feb 17, 2015
Emulation system with improved reliability of interconnect and a method for programming such interconnect
BERSHTEYN MIKHAIL5 citations71
US8612201B2Dec 17, 2013
Hardware emulation system having a heterogeneous cluster of processors
BERSHTEYN MIKHAIL2 citations60
US8468009B1Jun 18, 2013
Hardware emulation unit having a shadow processor
BERSHTEYN MIKHAIL0 citations39
SYNOPSYS INC
4 patentsUS12340155B2Jun 24, 2025
Detecting instability in combinational loops in electronic circuit designs
SYNOPSYS INC0 citations42
US12265122B1Apr 1, 2025
Memory profiler for emulation
SYNOPSYS INC0 citations42
US12437134B2Oct 7, 2025
Deterministic netlist transformations in a multi-processor parallel computing system
SYNOPSYS INC0 citations41
US12340157B2Jun 24, 2025
Non-functional loopback-paths removal from IO-pads using logic replication
SYNOPSYS INC0 citations39