Inventor

FURUKAWA TOSHIHARU

US287 patents

⚠️ This page may combine multiple inventors who share the name “FURUKAWA TOSHIHARU”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

FURUKAWA TOSHIHARU

IBM

Field effect transistor

Accessible chip stack and process of manufacturing thereof

Methods for forming uniform lithographic features

Forming capping layer over metal wire structure using selective atomic layer deposition

Method for forming quadruple density sidewall image transfer (SIT) structures

SOI hybrid structure with selective epitaxial growth of silicon

Structure for folded architecture pillar memory cell

Trench storage dynamic random access memory cell with vertical transfer device

Structure for folded architecture pillar memory cell

Method for forming pillar memory cells and device formed thereby

DRAM cell with grooved transfer device

Method and apparatus for cleaning a semiconductor substrate in an immersion lithography system

Method for interconnection between transfer devices and storage capacitors in memory cells and device formed thereby

SOI hybrid structure with selective epitaxial growth of silicon

Silicon anti-fuse structures, bulk and silicon on insulator fabrication methods and application

Methods of T-gate fabrication using a hybrid resist

High resolution dopant/impurity incorporation in semiconductors via a scanned atomic force probe

Resist image reversal by means of spun-on-glass

Semiconductor with nanoscale features

Integrated circuit chip utilizing carbon nanotube composite interconnection vias

FET with T-shaped gate

Borderless gate structures

Structure and process for multi-chip chip attach with reduced risk of electrostatic discharge damage

Method for increasing the capacitance of a semiconductor capacitors

Multi-level DRAM trench store utilizing two capacitors and two plates

Trench storage dynamic random access memory cell with vertical transfer device

Dram cell with three-sided-gate transfer device

Method for making a five square vertical DRAM cell

Method for making a DRAM cell with grooved transfer device

Method for forming features using frequency doubling hybrid resist and device formed thereby

High performance MOSFET device with raised source and drain

Trench storage dram cell including a step transfer device

Method of manufacturing an integrated ULSI heatsink

Integrated ULSI heatsink

Method for a controlled bottle trench for a dram storage node

Method for forming a uniform distribution of nitrogen in silicon oxynitride gate dielectric

Method for forming trench-isolated FET devices

Vertical nanotube semiconductor device structures and methods of forming the same

Micro-electro-mechanical valves and pumps and methods of fabricating same

Sub-lithographic imaging techniques and processes

Memory devices using carbon nanotube (CNT) technologies

Silicon-on-insulator (SOI) read only memory (ROM) array and method of making a SOI ROM

Non-volatile switching and memory devices using vertical nanotubes

Layout and process to contact sub-lithographic structures

SOI device with reduced junction capacitance

Method of forming fet with T-shaped gate

Semiconductor structures for latch-up suppression and methods of forming such semiconductor structures

Wrap-around gate field effect transistor

TOYOTA MOTOR CO LTD

Control system with failsafe for shift-by-wire automatic transmission

CHENG KANGGUO

Method for double pattern density