Inventor

SMITH SCOTT E

US76 patents

⚠️ This page may combine multiple inventors who share the name “SMITH SCOTT E”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SMITH SCOTT E

MICRON TECHNOLOGY INC

Method for noise and power reduction for digital delay lines

Methods, circuits, and systems to select memory regions

Reduced power redundancy address decoder and comparison circuit

Power reduction for delay locked loop circuits

Method and apparatus for achieving low power consumption during power down

Systems and methods for improving fuse systems in memory devices

Semiconductor device with modified access and associated methods and systems

Semiconductor devices having through-stack interconnects for facilitating connectivity testing

Methods for parity error alert timing interlock and memory devices and systems employing the same

Row clear features for memory devices and associated methods and systems

Apparatuses and methods for decoding addresses for memory

Semiconductor devices having through-stack interconnects for facilitating connectivity testing

Memory device with an input signal management mechanism

Electronic device with a fuse array mechanism

Electronic device with a fuse array mechanism

Mitigating line-to-line capacitive coupling in a memory die

Internal data availability for system debugging

Apparatuses and methods for single-pass access of ECC information, metadata information or combinations thereof

Apparatuses, systems, and methods for storing and accessing memory metadata and error correction code data

Apparatuses and methods for enhanced metadata support

Apparatuses and methods for enhanced metadata support

Apparatuses and methods for single-pass access of ECC information, metadata information or combinations thereof

Apparatuses and methods for configurable ECC modes

Synchronous input buffer control using a ripple counter

Memory with internal refresh rate control

Methods, apparatuses, and circuits for bimodal disable circuits

Methods, apparatuses, and circuits for bimodal disable circuits

Techniques for flexible self-refresh of memory arrays

Low power clock injection during idle mode operations

TEXAS INSTRUMENTS INC

Circuit for driving conductive line and testing conductive line for current leakage

Array block level redundancy with steering logic

Burn-in mode detect circuit for semiconductor device

Write per bit with write mask information carried on the data path past the input data latch

Fuse selectable timing signals for internal signal generators

Circuit and method for internal refresh counter

Circuit and method for internal refresh counter

Process of making and a DRAM standby charge pump with oscillator having fuse selectable frequencies

Electrostatic discharge protection circuit and method

Startup circuit for bandgap reference circuit

Testing and repair of wide I/O semiconductor memory devices designed for testing

Output buffer with boost from voltage supplies

LODESTAR LICENSING GROUP LLC

Row clear features for memory devices and associated methods and systems

Semiconductor device with modified access and associated methods and systems

Apparatuses and methods for decoding addresses for memory

Row clear features for memory devices and associated methods and systems

PROCTER & GAMBLE

Twist-up product dispenser having conformable apertured applicator surface

Antiperspirant aerosol compositions

Vapor permeable pressurized package

CYGNUS THERAPEUTIC SYSTEM

Occlusive, elastomeric backing materials in transdermal drug delivery systems, and associated methods of manufacture and use

MAZUMDER KALLOL

Memory circuit and control method thereof