Inventor
MCDONALD EDWARD A
US22 patents
⚠️ This page may combine multiple inventors who share the name “MCDONALD EDWARD A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
NCR CORP
8 patentsUS6292860B1Sep 18, 2001
Method for preventing deadlock by suspending operation of processors, bridges, and devices
NCR CORP89 citations95
US5919268AJul 6, 1999
System for determining the average latency of pending pipelined or split transaction requests through using two counters and logic divider
NCR CORP28 citations92
US5765195AJun 9, 1998
Method for distributing interprocessor interrupt requests via cache memory coherency mechanisms
NCR CORP30 citations92
US5758065AMay 26, 1998
System and method of establishing error precedence in a computer system
NCR CORP24 citations92
US6058475AMay 2, 2000
Booting method for multi-processor computer
NCR CORP35 citations90
US5418914AMay 23, 1995
Retry scheme for controlling transactions between two busses
NCR CORP33 citations90
US6098113AAug 1, 2000
Apparatus and method for address translation and allocation for a plurality of input/output (I/O) buses to a system bus
NCR CORP17 citations82
US5701422ADec 23, 1997
Method for ensuring cycle ordering requirements within a hierarchical bus system including split-transaction buses
NCR CORP19 citations77
INTEL CORP
7 patentsUS6754787B2Jun 22, 2004
System and method for terminating lock-step sequences in a multiprocessor system
INTEL CORP34 citations93
US6560682B1May 6, 2003
System and method for terminating lock-step sequences in a multiprocessor system
INTEL CORP21 citations93
US6128677AOct 3, 2000
System and method for improved transfer of data between multiple processors and I/O bridges
INTEL CORP48 citations93
US6026472AFeb 15, 2000
Method and apparatus for determining memory page access information in a non-uniform memory access computer system
INTEL CORP29 citations92
US6047316AApr 4, 2000
Multiprocessor computing apparatus having spin lock fairness
INTEL CORP41 citations91
US6073216AJun 6, 2000
System and method for reliable system shutdown after coherency corruption
INTEL CORP20 citations90
US6012127AJan 4, 2000
Multiprocessor computing apparatus with optional coherency directory
INTEL CORP33 citations88
NCR CO
3 patentsUS5359715AOct 25, 1994
Architectures for computer systems having multiple processors, multiple system buses and multiple I/O buses interfaced via multiple ported interfaces
NCR CO71 citations94
US5269005ADec 7, 1993
Method and apparatus for transferring data within a computer system
NCR CO32 citations92
US5327540AJul 5, 1994
Method and apparatus for decoding bus master arbitration levels to optimize memory transfers
NCR CO13 citations74