Inventor

TOPHAM NIGEL PETER

GB11 patents

⚠️ This page may combine multiple inventors who share the name “TOPHAM NIGEL PETER”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

PTS CORP

8 patents

US7343471B2Mar 11, 2008

Processor and method for generating and storing compressed instructions in a program memory and decompressed instructions in an instruction cache wherein the decompressed instructions are assigned imaginary addresses derived from information stored in the program memory with the compressed instructions

PTS CORP21 citations91

US7124279B2Oct 17, 2006

Processor and method for generating and storing compressed instructions in a program memory and decompressed instructions in an instruction cache wherein the decompressed instructions are assigned imaginary addresses derived from information stored in the program memory with the compressed instructions

PTS CORP32 citations91

US6944853B2Sep 13, 2005

Predicated execution of instructions in processors

PTS CORP21 citations91

US6826677B2Nov 30, 2004

Renaming registers to values produced by instructions according to assigned produce sequence number

PTS CORP23 citations91

US6993641B2Jan 31, 2006

Mapping circuitry and method comprising first and second candidate output value producing units, an in-range value determining unit, and an output value selection unit

PTS CORP1 citations51

ALTERA CORP

3 patents

US7805592B2Sep 28, 2010

Early resolving instructions

ALTERA CORP8 citations75

US7428630B2Sep 23, 2008

Processor adapted to receive different instruction sets

ALTERA CORP4 citations61

US7512771B2Mar 31, 2009

Mapping circuitry and method comprising first and second candidate output value producing units, an in-range value determining unit, and an output value selection unit

ALTERA CORP0 citations51

TOPHAM NIGEL PETER

PTS CORP

Predicated execution of instructions in processors

Renaming registers to values produced by instructions according to assigned produce sequence number

Stall control

Register file circuitry

Processor adapted to receive different instruction sets

Mapping circuitry and method comprising first and second candidate output value producing units, an in-range value determining unit, and an output value selection unit

ALTERA CORP

Early resolving instructions

Processor adapted to receive different instruction sets

Mapping circuitry and method comprising first and second candidate output value producing units, an in-range value determining unit, and an output value selection unit